Optimizing Energy Efficiency in Subthreshold RISC-V Cores By Asbjørn Djupdal, Norwegian University of Science and Technology February 21, 2025
An Open-Source Approach to Developing a RISC-V Chip with XiangShan and Mulan PSL v2 By Jonah McLeod, RISC-V Industry Analyst February 13, 2025
Timing Optimization Technique Using Useful Skew in 5nm Technology Node By Samir Shaik, eInfochips February 9, 2025
Interstellar: Fully Partitioned and Efficient Security Monitoring Hardware Near a Processor Core for Protecting Systems against Attacks on Privileged Software By YongHo Song, Korea Advanced Institute of Science and Technology February 6, 2025
Bigger Chips, More IPs, and Mounting Challenges in Addressing the Growing Complexity of SoC Design By Andy Nightingale, Arteris February 5, 2025
Infinite-ISP: An Open Source Hardware Image Signal Processor Platform for all Imaging Needs By Taimur Bilal, 10xEngineers Inc. February 4, 2025
Leveraging ASIC AI Chips for Homomorphic Encryption By Jianming Tong, Georgia Institute of Technology January 31, 2025
Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures By Shivendra Singh Parihar, Indian Institute of Technology January 27, 2025
Assessing Design Space for the Device-Circuit Codesign of Nonvolatile Memory-Based Compute-in-Memory Accelerators By Ashwin Sanjay Lele, TSMC January 27, 2025
Linearity Analysis of Source-Degenerated Differential Pairs for Wireline Applications By Kunal Yadav, University of Toronto January 22, 2025
How Ultra Ethernet And UALink Enable High-Performance, Scalable AI Networks By Ron Lowman, Synopsys January 20, 2025