Peripheral IP

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Compare 990 Peripheral IP from 91 vendors (1 - 10)
  • AMBA AXI5 Verification IP
    • AXI5 VIP is Compliant with the latest ARM™ AMBA AXI5 & AXI5 lite.
    • It is also compatible with AXI3, AXI4 Protocol Specification v2.0 referred to as AXI4 and AXI4-Lite.
    • Supports Unique ID feature for both read and write transactions.
    • Supports MTE(Memory Tagging Extension) feature to detect memory safety violations.
    Block Diagram -- AMBA AXI5 Verification IP
  • AMBA AXI4 Verification IP
    • Compliant to AMBA® AXI4 specifications from ARM and
    • supports for all variants of AXI4, AXI4-Lite and AXI4 Stream.
    • Support for all type of AMBA AXI4 devices.
    • Strong protocol checking Bus Monitor which also provides statistics of the transactions.
    Block Diagram -- AMBA AXI4 Verification IP
  • AMBA AXI STREAM Verification IP
    • Compliant with AMBA® AXI5- Stream and AXI4-Stream.
    • Support for all types of AMBA AXI5-Stream and AXI4-STREAM components.
    • Supports parameterized data widths.
    • Supports byte stream transmission number of data and null bytes.
    Block Diagram -- AMBA AXI STREAM Verification IP
  • AMBA ATB Verification IP
    • Compliant to AMBA 5 ATB (aka ATB-C), AMBA 4 ATB (aka ATB v1.1) and AMBA 3 ATB (aka ATB v1.0) Protocol.
    • Parameterized address and data width and hence capable of configuring all possible ATB and TPIU bus widths.
    • Bus Monitor is easy to Plug-in and is compliant with standard specifications.
    • Support for static and dynamic protocol checks.
    Block Diagram -- AMBA ATB Verification IP
  • AMBA APB 5,4,3,2 Verification IP
    • Compliant to AMBA APB5, AMBA APB v.2.0 (aka APB4), AMBA® 3 APB v1.0 and AMBA® 2APB.
    • Support for all types of AMBA APB devices.
    • Supports Parameterized data and address bus.
    • Supports bus-endian converter/checker.
    Block Diagram -- AMBA APB 5,4,3,2 Verification IP
  • AMBA AHB 5 Verification IP
    • Compliant to AMBA®5 AHB Protocol specifications and AMBA 3 AHB-Lite Verification IP from ARM
    • Support for all type of AMBA AHB devices:
      • AHB5Master
      • AHB5Slave
    • AHB5Master
    • AHB5Slave
    Block Diagram -- AMBA AHB 5 Verification IP
  • AMBA 5 CHI Verification IP
    • VIP is Compliant with the latest ARM™ AMBA5 CHI.
    • Support any type of network topology like Crossbar, Ring, Mesh, etc…
    • Support for all types of AMBA5 CHI Nodes:
      • Requester (RN-F, RN-D, RN-I)
      • Home (HN-F, HN-I)
      • Subordinate (SN-F, SN-I)
    • Requester (RN-F, RN-D, RN-I)
    Block Diagram -- AMBA 5 CHI Verification IP
  • AMBA 4 ACE Verification IP
    • Fully compliant to the AMBA® 4 ACE™ Specification.
    • Support for all type of AMBA 4 ACE devices.
    • Rich set of configuration parameters to control ACE functionality.
    • Parametrized bus width and cache line size.
    Block Diagram -- AMBA 4 ACE Verification IP
  • UART DO-254 IP Core
    • The Universal Asynchronous Receiver/Transmitter (UART) is a hardware device that translates data between parallel and serial forms.
    • UARTs are commonly used in conjunction with communication standards such as TIA (formerly EIA) RS-232, RS-422 or RS-485. 
    Block Diagram -- UART DO-254 IP Core
  • SPI Master DO-254 IP Core
    • The SPI Master IP Core implements an SPI Master fully compliant to the SPI Standard (Motorola’s M68H11 Reference Manual).
    • The Serial Peripheral Interface (SPI)  bus is a synchronous serial communication interface specification used for short distance communication, primarily in embedded systems.
    Block Diagram -- SPI Master DO-254 IP Core
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