Non-Volatile Memory IP (NVM)

Non-Volatile Memory IP (NVM) support various types of memory, including OTP, FTP and MTP.

All offers in Non-Volatile Memory IP (NVM)
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Compare 1,242 Non-Volatile Memory IP (NVM) from 10 vendors (1 - 10)
  • GF 22FDX 5.5V OTP Auto-Grade1 IO Staggered
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- GF 22FDX 5.5V OTP Auto-Grade1 IO Staggered
  • GF 22FDX 5.5V OTP Auto-Grade1 IO Inline
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- GF 22FDX 5.5V OTP Auto-Grade1 IO Inline
  • NVM OTP XBC TSMC N7 1.8V
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- NVM OTP XBC TSMC N7 1.8V
  • NVM OTP XBC TSMC N6 1.8V
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- NVM OTP XBC TSMC N6 1.8V
  • NVM OTP XBC TSMC N5A 1.2V Automotive Grade 1 with Functional Safety
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- NVM OTP XBC TSMC N5A 1.2V Automotive Grade 1 with Functional Safety
  • NVM OTP XBC TSMC N5 1.2V
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- NVM OTP XBC TSMC N5 1.2V
  • NVM OTP XBC TSMC N4P 1.2V
    • Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs
    • Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) IP, based on XHF architecture, enables designers to address these challenges
    • Synopsys’ OTP NVM IP architecture provides high levels of security, high yields, low power, and excellent reliability, which is why Synopsys OTP NVM is the leader in antifuse technology with >10B units shipped and availability in more than a dozen foundries
    • Synopsys OTP NVM IP is silicon-verified in TSMC N4P, N5, N5A, N6, and N7
    Block Diagram -- NVM OTP XBC TSMC N4P 1.2V
  • Secure OTP
    • Up to 128kb mass production OTP with built-in instant hardware encryption (customization available)
    • Comprehensive anti-tamper designs in physical and RTL
    • APB control interface with secure/non-secure access privilege
    • Four 256-bit hardware PUF fingerprints for scrambling drop-in-use Secure OTP Storage
    Block Diagram -- Secure OTP
  • OTP
    • Bit Cell Structure : 0.5 Transistor based
    • Bit Cell Size : 7.5F2
    • Bit Cell Process : Standard CMOS Logic Process plus one extra mask
    • On-chip Capacity : Up to 256Mb beyond 4Mb Scalable to 20 nm node and below
    Block Diagram -- OTP
  • NVM MTP EEPROM TSMC 65nm LP 2.5V SVT, SVT/HVT
    • Synopsys MTP EEPROM Non-Volatile Memory (NVM) IP is a Multi-Time Programmable (MTP) block developed in standard logic CMOS processes
    • Supporting up to 8-Kbit configurations and up to 400,000 write cycles with program/erase and read operations up to 125°C, the compact NVM IP enables true electrically erasable programmable read only memory (EEPROM) performance without requiring additional masks for processing steps
    • Delivered as a hard IP block, the low-power, reprogrammable Synopsys MTP EEPROM NVM IP operates from the core supply and includes all the necessary support and control circuitry, including all high-voltage generation and distribution required for programming
    • Synopsys MTP EEPROM NVM IP is available in advanced, high voltage, BCD, and analog mixed-signal processes.
×
Semiconductor IP