IP Catalog > Interface IP Cores

Interface IP Cores

Interface IP cores are used to achieve communication between chips and external devices or other chips. Common interface standards include USB, PCIe, SATA, I2C, SPI, Ethernet, etc.

Explore our vast directory of Interface IP cores below.

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Compare 3,559 Interface IP Cores from 180 vendors (1 - 10)
  • Lithe Layer 2 Gigabit Ethernet Switching IP
    • The Lithe Layer 2 Gigabit Ethernet Switching IP is a comprehensive solution for building scalable and efficient network infrastructures.
    • Designed to operate at the data link layer of the OSI model, our Lithe Layer 2 IP offers advanced networking capabilities for local area networks (LANs), metropolitan area networks (MANs), and wide area networks (WANs).
    • With support for various networking protocols and features, our Lithe IP enables seamless connectivity, reliable data transmission, and efficient network management.
    Block Diagram -- Lithe Layer 2 Gigabit Ethernet Switching IP
  • ARINC 429 IP Core
    • ARINC 429 IP Core implements ARINC 429 standard.
    • IP Core contains Rx and Tx processing blocks, Controller Block, Internal Memory and External Memory Interfaces.
    • A429 IP communicates with CPU (Central Processing Unit) and external memory through AXI interface.
    Block Diagram -- ARINC 429 IP Core
  • ARINC664 Switch IP Core
    • ARINC664 Switch IP implements ARINC664 part 7 and provides switching functionality within the ARINC664 network.
    • As an implementation of ARINC664 Switch, IP switches/routes messages of different sizes and different time constraints to their destination with a predictable delay.
    Block Diagram -- ARINC664 Switch IP Core
  • ARINC664 End System IP Core
    • ARINC664 End System IP is an IP Core that implements ARINC664 part 7 and provides interface between aircraft LRUs and ARINC664 network.
    • As an implementation of End System, IP sends the user's messages of different sizes and different time constraints to their destination with a predictable delay.
    Block Diagram -- ARINC664 End System IP Core
  • DO-254 compliant MIL-STD-1553B IP core
    • MIL-STD-1553B IP Core implements MIL-STD-1553B standard and provides single or multi-functional interface between host processor and MIL-STD-1553 bus transceiver.
    • DO-254 compliant MIL-STD-1553B IP core can function as Bus Controller (BC), two separate Remote Terminals (RT) and Bus Monitor (BM), simultaneously.
    Block Diagram -- DO-254 compliant MIL-STD-1553B IP core
  • MIPI CSI-2 IP
    • The MIPI CSI-2 IP core is a highly scalable and silicon-agnostic implementation of the  MIPI Camera Serial Interface 2 version 4.1 targeting ASIC and FPGA technologies.
    • The MIPI CSI-2 implementation enables high-speed, low-power transmission of image data from camera modules to host processors.
    Block Diagram -- MIPI CSI-2 IP
  • PCIe Gen 7 Verification IP
    • The PCIe Gen 7 Verification IP provides an effective & efficient way to verify the components interfacing with PCIe Gen 7 interface of an IP or SoC. 
    • The PCIe Gen 7 VIP is fully compliant with latest PCI Express Gen 7 specifications. This VIP is a light weight with an easy plug-and-play interface so that there is no hit on the design cycle time.
    Block Diagram -- PCIe Gen 7 Verification IP
  • USB4 v2.0 Verification IP
    • Fully compliant with USB4 specification v2.0 (October 2022) and Connection Manager version 2.0.
    • Supports USB3.2 Specification, Revision 1.1 and backward compatibility to USB2.0.
    • Supports USB Power Delivery Release 3.1, Version 1.8 and Type-C v2.2.
    • Supports Thunderbolt (TBT3) interoperability.
    Block Diagram -- USB4 v2.0 Verification IP
  • USB Type-C and Power Delivery Verification IP
    • Compliant with standard USB PD Rev 3.1 V1.8, Type-C Rev2.2 & USB type C Port controller interface Rev2.0 V1.3.
    • Supports enabling USB4 (Gen 2/Gen 3/Gen 4) over type C Connectors.
    • Supports both Standard Power range (SPR) and Extended Power range (EPR) modes of operation.
    • Supports all Fixed voltage supply, Programmable power supply (PPS) and Adjustable Votlage supply (AVS).
    Block Diagram -- USB Type-C and Power Delivery Verification IP
  • USB 4.0 Verification IP
    • Fully compliant with USB4 specification v1.0 (March 2022) and Connection Manager version 1.0.
    • Supports USB3.2 Specification, Revision 1.1 and backward compatibility to USB2.0.
    • Supports USB Power Delivery Release 3.1, Version 1.8 and Type-C v2.2.
    • Supports Thunderbolt (TBT3) interoperability.
    Block Diagram -- USB 4.0 Verification IP
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