Display Processing IP
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7
Display Processing IP
from 3 vendors
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7)
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Deep Learning-based Video Super Resolution Accelerator IP
- DeepField-SR is a fixed functional hardware accelerator IP for FPGA and ASIC, offering the highest computational efficiency for Video Super Resolution.
- Based on proprietary AI models trained with real world video dataset and fusing spatio-temporal information in multiple frames, DeepField-SR produces superior high resolution video quality and upscales to fit lager displays.
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Display Port Synthesizable Transactor
- Supports full Display port source device and sink device functionality
- Supports multi lanes upto 4 lanes
- Supports control symbols for framing(Both Default & Enhanced framing mode)
- Supports interlaced & non-interlaced video stream
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Pixel processor - High Image Quality Super Resolution
- Enables transfer of low-resolution sources to reduce bandwidth, while allowing high quality and high resolution to be displayed at the edge
- Offers robust pixel processing features and can perform detail enhancement without changing the color and saturation.
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Very fast VMAF accelerator
- It measures VMAF, a video quality metric, faster than open source.
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Display Controller IP
- Target Display Resolution: 1080P
- MIPI-DBI Interfaces Support
- MIPI-DPI Interfaces Support
- Default Layers:1
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High-quality and powerful display processor
- Support 8K@60FPS or multiple 4K@120FPS
- All common HDR formats, including HDR10, HDR10+ and HLG
- Security Features for Content Protections
- Subjective and objective image quality
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Scalable and flexible display processor
- Leading Performance per Area
- Extreme Low Power Design
- Display Output
- AXI bus Interfaces