Security Processor IP
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18
Security Processor IP
from 10 vendors
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10)
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Crypto Coprocessor
- Comprehensively support all CPU architectures
- Crypto engine collective, consisting of private key cipher, message authentication code, hash, and key derivation functions that are NIST CAVP certified and OSCCA standards compliant
- Key wrapping function aiding the export of keys for external use
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Secure Execution Processor
- Built-in protection of code and data in a 32-bit compact, low-power, royalty-free, processor IP core.
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Secure Boot Hardware Engine
- Protection Layers
- Public-Key Authentication Benefits
- Fast & Compact
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Compact Processor for Security
- Secure MPU against memory tampering
- Shields against side-channel attack
- Secure debug for multi-party software development
- Flexible configurations and run-time control
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ARC EM22FS safety processor
- Dual-core lockstep safety processor supports ISO 26262 automotive safety standards
- Single solution support for safety level up to ASIL D; Supports both ASIL D lockstep operation or ASIL B single core operation
- Includes hardware safety features such as ECC, integrated user-programmable windowed watchdog timer, and lockstep safety monitor
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ARC SEM120D Security Processor with DSP for Low Power Embedded Applications
- Performance-, power- and area-efficient security processors for embedded applications
- Secure privilege mode orthogonal to kernel/user mode
- Enhanced secure MPU with context ID for secure or normal operation
- Up to 16 configurable protected regions and per region scrambling capability
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ARC SEM110 Security Processor for Low Power Embedded Applications
- Performance-, power- and area-efficient security processors for embedded applications
- Secure privilege mode orthogonal to kernel/user mode
- Enhanced secure MPU with context ID for secure or normal operation
- Up to 16 configurable protected regions and per region scrambling capability
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ARC SEM130FS Safety and Security Processor
- ASIL D compliant dual-core, lockstep safety processor supports ISO 26262 automotive safety standards and provides advanced security to protect against evolving threats
- Secure privilege mode orthogonal to kernel/user mode
- Integrated self-checking safety monitor capable of time diversity
- Uniform instruction timing and timing/ power randomization for side channel resistance
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ARC-V RMX-100 Processor IP
- Family of 32-bit RISC processors for ultra-low power embedded applications
- Based on the RISC-V ISA, leveraging standard 32-bit protocols (and extensions)
- DSP instruction extensions (RMX-100D)
- Easy DSP programming support with MetaWare C/C++ Compiler (RMX-100D)
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ARC-V RMX-500 Processor IP
- Family of 32-bit processors for low-power embedded applications
- Based on the RISC-V ISA, leveraging standard 32-bit protocols (and extensions)
- RISC and RISC + DSP 32-bit processors for low-power embedded applications (RMX-500D)
- DSP instruction extensions (RMX-500D)