e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
May 15, 2025
Semiconductor IP Articles
How to design secure SoCs, Part II: Key Management
May 13, 2025
Seven Key Advantages of Implementing eFPGA with Soft IP vs. Hard IP
May 12, 2025
Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU
May 12, 2025
Data Movement Is the Energy Bottleneck of Today’s SoCs
May 12, 2025
Breaking Barriers in SoC Design with Smart NoC Automation
May 12, 2025
Scaling On-Device GPU Inference for Large Generative Models
May 11, 2025
Input-Triggered Hardware Trojan Attack on Spiking Neural Networks
May 11, 2025
DisplayPort 2025: Navigating the Next Wave of Display Innovation
May 7, 2025
Efficient Magnetization Switching via Orbital-to-Spin Conversion in Cr/W-Based Heterostructures
May 7, 2025
Real-Time ESD Monitoring and Control in Semiconductor Manufacturing Environments With Silicon Chip of ESD Event Detection
May 5, 2025
Benchmarking Ultra-Low-Power 𝜇NPUs
April 28, 2025
Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
April 26, 2025
Automating Hardware-Software Consistency in Complex SoCs
April 26, 2025
All-in-Memory Stochastic Computing using ReRAM
April 24, 2025
Deploying anti-tamper IP
April 23, 2025
Not all overvoltage tolerant GPIOs are the same
April 22, 2025
How NoC architecture solves MCU design challenges
April 18, 2025
How to Design Secure SoCs: Essential Security Features for Digital Designers
April 15, 2025
Memory Safety Features Impact on Ibex based processor area
April 11, 2025