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Timer/Watchdog IP

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Compare 39 Timer/Watchdog IP from 15 vendors (1 - 10)
  • Universal Timers System
    • The Universal Timers System is a programmable and highly configurable device that comprises seven submodules: Pulse Width Modulation (PWM), Timer 1, Timer 2, Timer 3, Real-Time Interrupt (RTI), Computer Operates Properly (COP), Pulse Accumulator (PA)
    Block Diagram -- Universal Timers System
  • APB Timer
    • The APB Timer module is a sixteen-bit down counter with a selectable prescaler. Prescale values of 1, 16 and 256 can be selected.
    • The prescaler extends the timer’s range at the expense of precision.
    • The Timer provides two modes of operation that provide a free running value and also periodic interrupts.
    Block Diagram -- APB Timer
  • APB Windowed Watchdog Timer
    • The Watchdog Timer is useful in monitoring the condition where a CPU and software get into an unrecoverable unknown or “stuck” state.
    • Software periodically “kicks” the watchdog by writing to it to reset its timeout counters.
    • The Watchdog Timer module is a programmable reset controller module.
    Block Diagram -- APB Windowed Watchdog Timer
  • Real-Time Clock with APB Interface
    • The RTC-APB core implements a real-time clock (RTC) and calendar facility together with an alarm function. 
    • To keep track of time of day the core uses a series Binary-Coded Decimal (BCD) counters that count time and date with an accuracy of 1/10 of s second.
    Block Diagram -- Real-Time Clock with APB Interface
  • Timer/Counter with APB Interface
    • 32-bit Timer/Counter
    • 32-bit APB3 interface
    • Independent APB and timer clocks
    • Programmable prescaler (synthesis-time defined bit-width)
    Block Diagram -- Timer/Counter with APB Interface
  • Watchdog Timer with APB Interface
    • Programmable 32-bit Down Counter with 16-bit pre-scaler
    • Interrupt generation on counter timeout
    • Reset generation on counter timeout in case that interrupt was not serviced
    • Locking mechanism to prevent non-intentional configuration
    Block Diagram -- Watchdog Timer with APB Interface
  • WATCHDOG IIP
    • Supports to prevent system lock up due to software anomalies or hardware failure
    • Supports cold reset after configured interval
    • Supports interrupt indication after programmed time period
    • Supports both firmware and hardware pause and resume
    Block Diagram -- WATCHDOG IIP
  • TIMER IIP
    • Supports 32 timers each of 32 bit.
    • Supports up/down counting modes.
    • Supports configurable counter width.
    • Supports to count a maximum value of 32'hFFFFFFFF in Generate and Capture mode.
    Block Diagram -- TIMER IIP
  • Watchdog Timer
    • Watch Dog Timer IP supports- 24-bit prescalar.
    • Enable and timeout duration are programmable.
    • Optional safety feature to unlock the safety pattern.
    • Supports Suspend mode operation.
    Block Diagram -- Watchdog Timer
  • Fault Resistant General Purpose timers
    • Timers with following features -
    • 1. Standard AMBA AHB/ APB Interface supported.
    • 2. Cascade Mode of timers supported to run a bigger timers.
    • 3. Registers Protection implemented to ensure Timer Behavior and protection against Processor Code Run Error.
    Block Diagram -- Fault Resistant General Purpose timers
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Semiconductor IP