IP Catalog > Security IP

Security IP

Security IP cores are critical components designed to protect embedded systems from cyber threats by providing encryption, authentication, and secure communication. These cores enhance the security of devices by integrating advanced features like Crypto Accelerator IP, which accelerates cryptographic algorithms, and DPA and FIA Countermeasures IP, which safeguard against side-channel attacks. Inline Memory Encryption IP ensures that sensitive data stored in memory is encrypted in real-time, while Quantum Safe Cryptography IP prepares devices for future-proof security against quantum computing threats. Root of Trust IP establishes a secure foundation for boot processes, and Security Protocol Engine IP manages secure communication protocols for reliable, encrypted data transfer.

All offers in Security IP
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Search (530)
Compare 530 Security IP from 82 vendors (1 - 10)
  • PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
    • eSi-Crystals is a hardware core for accelerating the high-level operations specified in the NIST FIPS 202, FIPS 203 and FIPS 204 standards.
    • It supports the Cryptographic Suite for Algebraic Lattices (CRYSTALS), it is lattice-based digital signature algorithm designed to withstand attacks from quantum computers, placing it in the category of post-quantum cryptography (PQC). 
    Block Diagram -- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
  • HDCP Verification IP
    • Supports HDCP 1.4, HDCP 2.2 and HDCP 2.3 end to end protection.
    • Can handle HDCP encryption and decryption for 8 bit and 32 bit link symbol.
    • Capable of continuous link integrity check for all lanes and rates.
    • Supports aux transactions for authentication protocol.
    Block Diagram -- HDCP Verification IP
  • ECC7 Elliptic Curve Processor for Prime NIST Curves
    • Elliptic Curve Cryptography (ECC) is a public-key cryptographic technology that uses the mathematics of so called “elliptic curves” and it is a part of the “Suite B” of cryptographic algorithms approved by the NSA.
    • The design is fully synchronous, with the exception of the seed part, and available in both source and netlist form.
    • The core is supplied as portable Verilog (VHDL version available) thus allowing customers to carry out an internal code review to ensure its security.
    Block Diagram -- ECC7 Elliptic Curve Processor for Prime NIST Curves
  • 1G/2.5G/5G/10G/25G/50G MACsec
    • The MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE.
    • It protects components in Ethernet networks especially high-speed Ethernet used in automotive, industrial, cloud, data center, and wireless infrastructure.
    • The MACsec IP is a fully compliant solution that provides line-rate encryption and supports VLAN-in-Clear.
    Block Diagram -- 1G/2.5G/5G/10G/25G/50G MACsec
  • 10M MACsec
    • The MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE.
    • It protects components in Ethernet networks especially very low-speed Ethernet used in automotive, industrial, and consumer applications.
    • The MACsec IP is a fully compliant solution that provides line-rate encryption and is optimized for the smallest area size.
    Block Diagram -- 10M MACsec
  • 100G / 200G / 400G / 800G / 1.6T MACsec
    • The MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE.
    • It protects components in Ethernet networks especially very high-speed Ethernet used in cloud, data center, and backhaul networks.
    • The MACsec IP is a fully compliant solution that provides line-rate encryption and supports VLAN-in-Clear.
    Block Diagram -- 100G / 200G / 400G / 800G / 1.6T MACsec
  • Root of Trust
    • Root of Trust IP is a Hardware Secure Module (HSM) solution that provides the security foundation for processors and System on Chips (SoCs).
    • It protects critical systems especially devices used in automotive, industrial, cloud, data center, and wireless applications.
    Block Diagram -- Root of Trust
  • MSP7-32 MACsec IP core for FPGA or ASIC
    • The MSP7 implementation fully supports the IEEE 802.1ae (MACsec) algorithm for 128-bit bit keys, including AES support in Galois Counter Mode (GCM) per NIST publication SP800-38D.
    • The core is designed for flow-through operation. MSP7 supports encryption and decryption modes (encrypt-only and decrypt-only options are available.
    Block Diagram -- MSP7-32 MACsec IP core for FPGA or ASIC
  • RSA2-AHB Accelerator Core with AHB Interface
    • The core implements the exponentiation operation of the RSA cryptography Q = Pk.
    • The operands for the exponentiation: k and P as well as the modulus are programmed into the memory and the calculation is started.
    • Once the operation is complete, the result Q can be read through the AHB interface.
    Block Diagram -- RSA2-AHB Accelerator Core with AHB Interface
  • Scalable RSA and Elliptic Curve Accelerator
    • The core implements the exponentiation operation of the RSA cryptography Q = Pk.
    • The operands for the exponentiation: k and P as well as the modulus are programmed into the memory and the calculation is started.
    • Once the operation is complete, the result Q can be read through the interface.
    Block Diagram -- Scalable RSA and Elliptic Curve Accelerator
×
Semiconductor IP