Security IP

Security IP cores are critical components designed to protect embedded systems from cyber threats by providing encryption, authentication, and secure communication. These cores enhance the security of devices by integrating advanced features like Crypto Accelerator IP, which accelerates cryptographic algorithms, and DPA and FIA Countermeasures IP, which safeguard against side-channel attacks. Inline Memory Encryption IP ensures that sensitive data stored in memory is encrypted in real-time, while Quantum Safe Cryptography IP prepares devices for future-proof security against quantum computing threats. Root of Trust IP establishes a secure foundation for boot processes, and Security Protocol Engine IP manages secure communication protocols for reliable, encrypted data transfer.

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Compare 497 Security IP from 79 vendors (1 - 10)
  • Quantum Safe, ISO 21434 Automotive-grade Programmable Hardware Security Module
    • The automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 compliant hardware security modules offering Quantum Safe security by design for secure automotive applications.
    • The CryptoManager RT-7xx family protects against a wide range of hardware and software attacks through state-of-the-art side channel attack countermeasures and anti-tamper and security techniques.
    Block Diagram -- Quantum Safe, ISO 21434 Automotive-grade Programmable Hardware Security Module
  • Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
    • The RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware security cores offering security by design for automotive applications.
    • They protect against a wide range of failures such as permanent, transient and latent faults and hardware and software attacks with state-of-the-art anti-tamper and security techniques.
    Block Diagram -- Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
  • Programmable Root of Trust with Quantum Safe Cryptography acceleration, DPA-resistant & FIA-protected cryptographic accelerators and Caliptra RoTM
    • The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant hardware security cores offering Quantum Safe security by design for data center and other highly secure applications.
    • Device and system architects face a growing array of security threats, including the threat of quantum computers. Across applications, one constant is the need for a hardware Root of Trust-based security implementation.
    Block Diagram -- Programmable Root of Trust with Quantum Safe Cryptography acceleration, DPA-resistant & FIA-protected cryptographic accelerators and Caliptra RoTM
  • Fast Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA
    • Compliant with FIPS 203 ML-KEM and FIPS 204 ML-DSA standards
    • Uses CRYSTALS-Kyber, CRYSTALS-Dilithium quantum-resistant algorithms
    • Includes SHA-3, SHAKE-128 and SHAKE-256 acceleration
    • The embedded QSE CPU combined with Rambus-supplied firmware implements the full FIPS 203/204 protocols
    Block Diagram -- Fast Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA
  • Cutting-Edge Hardware Security IP
    • The IoT’s hardware security IP, provides SoC manufacturers with robust, modular, and advanced security and cryptographic capabilities.
    • The solutions address IoT security requirements, with upgradable cryptographic capabilities to adapt to evolving conditions.
    • The KSE Portfolio provides a diverse range of proven, certification-ready embedded security features, compliant with key governmental and industry standards.
    Block Diagram -- Cutting-Edge Hardware Security IP
  • Integrated Security Services Platform (iSSP)
    • Secure connectivity protocols which offers implementation of security protocols such as MACSec, IPSec
    Block Diagram -- Integrated Security Services Platform (iSSP)
  • Programmable Root of Trust Family With DPA & Quantum Safe Cryptography
    • Hardware Root of Trust employing a custom 32-bit RISC-V processor
    • Multi-layered security model provides protection of all components in the core
    • NIST CAVP and CMVP compliant for FIPS 140-3 validation
    • State-of-the-art anti tamper techniques
    • DPA-resistant cryptographic accelerators
    • Caliptra Root of Trust for Measurement with DICE and X.509 support
    Block Diagram -- Programmable Root of Trust Family With DPA & Quantum Safe Cryptography
  • 800G Multi-Channel MACsec Engine with TDM Interface
    • Complete and fully compliant MACsec Packet Engine with classifier and transformation engines for rates of 100 to 800 Gbps, up to 64 channels, ready for FlexE
    • All IEEE MACsec standards supported (including IEEE802.1AE-2018). Optional inclusion of Cisco extensions, IPsec ESP tunnel and transport mode with AES-GCM cipher
    • Supplied with the Driver Development Kit to accelerate time to market. Rambus offers MACsec Toolkit for IEEE 802.1X key management
    Block Diagram -- 800G Multi-Channel MACsec Engine with TDM Interface
  • Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
    • One input word per clock without any backpressure
    • Design can switch stream, algorithm, mode, key and/or direction every clock cycle
    • GCM: throughput is solely determined by the data width, data alignment and clock frequency
    • XTS: block processing rate may be limited by the number of configured tweak encryption & CTS cores; a configuration allowing 1 block/clock is available
    Block Diagram -- Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
  • 1G to 100G Single-Port MACsec Engine
    • Complete HW/SW system.
    • Driver Development Kit.
    • High-speed MACsec Frame Engine
    • Silicon-proven implementation
    • Fast and easy to integrate into SoCs.
    • Flexible layered design.
    Block Diagram -- 1G to 100G Single-Port MACsec Engine
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