I2C IP

The I²C slave core is a simple I²C slave that provides a link between the I²C bus and the AMBA APB.
The core is compatible with the Philips I²C standard and supports 7- and 10-bit addressing with an optionally software programmable address.
Standard-mode (100 kb/s) and Fast-mode (400 kb/s) operation are supported directly.

The I²C master core is a simple I²C master that provides a link between the I²C bus and the AMBA APB.
The I²C-master core is a modified version of the OpenCores I²C-Master where the WISHBONE interface has been replaced with an AMBA APB interface.
The core is compatible with Philips I²C standard and supports 7- and 10-bit addressing. Standard-mode (100 kb/s) and Fast-mode (400 kb/s) operation are supported directly.

The Inter-IC bus, or I2C bus is a two wire serial bus. It supports multi-master applications with its built-in arbitration scheme.
The I2C bus is widely used as a peripheral extension bus and to interface with configuration memories.

The I2C (Inter - Integrated Circuit) protocol is a widely used serial communication protocol for transferring data between electronic devices. It was developed by Philips in the 1980s and is now owned by NXP Semiconductors. I2C uses two bidirectional data lines called SDA (Serial Data) and SCL (Serial Clock) for communication between devices.
It allows multiple devices to be connected to the same bus, and each device can be identified by a unique address. The protocol supports data transfer rates ranging from a few kilobits per second to several hundred kilobits per second.

The I2C Slave IP Core implements an I2C Slave fully compliant to the I2C-bus specification and user manual Rev. 5 – 9 October 2012 for Standard-mode, Fast-mode and Fast-mode Plus (Fm+).
The Inter-Integrated Circuit (I2C) is a multi-master, multi-slave, single-ended, serial computer bus invented by Philips Semiconductor (now NXP Semiconductors).

Design Assurance Level A according to RTCA DO-254/ED-80 (April, 2000)
Fully compliant to the I2C-bus specification and user manual Rev. 5 – 9 October 2012 for Standard-mode, Fast-mode and Fast-mode Plus (Fm+)
Configurable data rate (100kHz, 400kHz or 1000kHz)
Support for all Options (Multi-master, Synchronization, Arbitration, Clock stretching, 10-bit slave address, General Call address, Software Reset and START byte)

A TSMC 110nm Wirebond and Flipchip compatible I/O library with 1.2V/3.3V Fail-Safe GPIO, 3.3V I2C Open-Drain I/O, SPI and associated ESD.
This silicon proven, wirebond and flipchip compatible library is particularly tailored to address gaps in the native foundry IO offerings for this node.
It features a 1.2V/3.3V GPIO with selectable drive strengths and optional internal 100K ohm pull up or pull down resistor and a selectable Schmitt trigger.

MIPI I3C master Controller IP Core is fully compliant with the latest I3C specification and delivers high bandwidth and scalability for integration of multiple sensors into mobile, automotive and IoT system-on-chips (SoCs)
The MIPI I3C master Controller supports in-band interrupts within the 2-wire interface provides significantly lower pin count, simplifying board design and reducing power and cost of the system The MIPI I3C master Controller IP is fully backward compatible with I2C, allowing designers to future proof their design, and the I3C controller IP operating modes enable systems with several ICs to efficiently connect to all sensors on a single I3C bus

MIPI I3C Controller IP Core is fully compliant with the latest I3C specification and delivers high bandwidth and scalability for integration of multiple sensors into mobile, automotive and IoT system-on-chips (SoCs)
The MIPI I3C Controller supports in-band interrupts within the 2-wire interface provides significantly lower pin count, simplifying board design and reducing power and cost of the system

The I2C Interface provides full support for the two-wire I2C synchronous serial interface, compatible with the ACCESS.
Bus physical layer, with additional support for the SMBus protocol, including Packet Error Checking (PEC).
Through its I2C compatibility, it provides a simple interface to a wide range of low-cost memories and I/O devices, including: EEPROMs, SRAMs, timers, A/D converters, D/A converters, clock chips, and peripheral drivers.