IP Catalog > Memory Controller/PHY IP

Memory Controller/PHY IP

Memory Interface IP cores support a wide range of memory types and standards, including DDR IP (Double Data Rate), GDDR IP (Graphics Double Data Rate), HBM IP (High Bandwidth Memory), and LPDDR IP (Low Power DDR), ensuring optimal performance in applications such as gaming, data centers, and mobile devices. NVM Express IP offers high-speed, low-latency storage interface for solid-state drives, while ONFI IP supports NAND flash memory communication. Additionally, SAS IP (Serial Attached SCSI) and SATA IP (Serial ATA) enable reliable, high-performance storage solutions, and SD/eMMC IP cores facilitate efficient data transfer for embedded systems.

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Search (1,780)
Compare 1,780 Memory Controller/PHY IP from 78 vendors (1 - 10)
  • AGILEX 7 R-Tile Gen5 NVMe Host IP
    • The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
    • The register file interface simplify the management of the IP for CPU interface or State Machine interface using Avalon bus.
    Block Diagram -- AGILEX 7 R-Tile Gen5 NVMe Host IP
  • NVME Host Zynq IP
    • PCIe RP and EP register configuration is done automatically.
    • NVMe register configuration is done automatically.
    • Able to manage 8 Name Spaces.
    • Able to manage until 16 IO Queue to fit specific user requirement.  Each IO Queue is independent.
    Block Diagram -- NVME Host Zynq IP
  • NVME Host Kintex IP
    • PCIe RP and EP register configuration is done automatically.
    • NVMe register configuration is done automatically.
    • Able to manage 8 Name Spaces.
    • Able to manage until 16 IO Queue to fit specific user requirement.  Each IO Queue is independent.
    Block Diagram -- NVME Host Kintex IP
  • NVME HOST VIRTEX 7 IP
    • PCIe RP and EP register configuration is done automatically.
    • NVMe register configuration is done automatically.
    • Able to manage 8 Name Spaces.
    • Able to manage until 16 IO Queue to fit specific user requirement. Each IO Queue is independent.
    Block Diagram -- NVME HOST VIRTEX 7 IP
  • EXFAT IP Soft Core for NVMe
    • Able to manage several disk in RAID0
    • Same speed as in raw data format
    • Support only 512-Byte LBA unit
    • Support any disk size
    Block Diagram -- EXFAT IP Soft Core for NVMe
  • FAT32 IP Soft Core for NVMe
    • Able to manage several disk in RAID0
    • Same speed as in raw data format
    • Support until 2TB disk size
    • One directory per recording session
    • One session file available to describe the recording session
    Block Diagram -- FAT32 IP Soft Core for NVMe
  • ARTIX Ultra Scale Plus NVME HOST IP – Gen4
    • When using a PCIe RP IP configured in Gen4 the system frequency is at 250MHz/256-Bits.
    • When using a PCIe RP IP configured in Gen3 the system frequency is at 125MHz/256-Bits.
    Block Diagram -- ARTIX Ultra Scale Plus NVME HOST IP – Gen4
  • Kintex Ultra Scale Plus NVMe Host IP
    • The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
    • The register file interface simplify the management of the IP for CPU interface or State Machine interface using AXI bus.
    Block Diagram -- Kintex Ultra Scale Plus NVMe Host IP
  • Block Diagram -- LPDDR6 PHY & Controller
  • xSPI + eMMC Combo PHY IP
    • This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solution, enabling support for two distinct memory protocols within the same IP.
    • By combining the PHY layers for both interfaces, the design simplifies system integration, reduces area and pin count, and enhances design flexibility for SoCs that require both boot and high-speed storage functionality.
    Block Diagram -- xSPI + eMMC Combo PHY IP
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