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Compare 174 Other from 62 vendors (1 - 10)
  • Tessent Status Monitor
    • Analyzes on-chip signals and interfaces.
    • Measure the performance and verify the functionality
    • “Logic-analyzer” type visibility of internal signals not normally detectible off-chip
    • Run-time configurable
    Block Diagram -- Tessent Status Monitor
  • Spatial Audio & Head Tracking Solution
    • Supports mono, stereo and multi-channel audio input
    • Multiple head tracking auto-recentering modes to combat sensor drift
    Block Diagram -- Spatial Audio & Head Tracking Solution
  • Magillem Registers System Integration Automation
    • Single database: Import and capture memory map information into a single database (IP-XACT)
    • Graphical edition: IP memory map capture & management GUI, system memory map capture & management GUI, system level schematic configurability, GUI with linting cross-checking editor
    • Parameterization: including configurable and conditional properties, custom-specific access types, and register modes
    • SystemRDL compiler: full support of version 1.0, limited support for version 2.0
    Block Diagram -- Magillem Registers System Integration Automation
  • Magillem Connectivity System Integration Automation
    • Project management: Design navigation and data aggregation
    • HDL import: Automatic import of structural RTL into a valid IP-XACT design with the support of SystemVerilog, Verilog, and VHDL languages
    • IP Packaging: Aggregate component information from different sources in a structured and standard-based format for several design tasks and teams (automatic mapping of bus interfaces, specification of the views with complete fileSet for various skills)
    • SoC assembly: Powerful rule-based connectivity, bus interface detection, bus/signal split/tie/open, hierarchical connection, glue logic insertion, feedthrough
    Block Diagram -- Magillem Connectivity System Integration Automation
  • Empowering Design Quality with Harmony Trace
    • Comprehensive traceability: Create and maintain traceability between requirements, specifications, hardware designs, software code, tests, and documentation.
    • System-of-systems integration: Harmonize disparate systems for end-to-end traceability of all artifacts.
    • Tool integration: Link information from leading tools in requirements management, code repository, EDA, software engineering, verification, test, and documentation.
    • Multi-domain linking: Enable traceability across multiple domains, providing a comprehensive understanding of the design.
    Block Diagram -- Empowering Design Quality with Harmony Trace
  • HW/SW interface foundation for design innovation
    • Various Input Formats:
    • CSRSpec Language
    • SystemRDL
    • IP-XACT
    Block Diagram -- HW/SW interface foundation for design innovation
  • All Silicon Charge Pump for X-FAB 180nm
    • Silicon proven in X-FAB XP018
    • Input Voltage: 2.5 – 3.3V
    • Output Voltage: 3 – 35V
    Block Diagram -- All Silicon Charge Pump for X-FAB 180nm
  • Camera Demosaicing IP (RCCB)
    • Maximum Resolution: 8MP (3840h x 2160v) 
    • Maximum Input Frame Rate: 30fps  
    • Low Power Consumption  
    • RCCB Pattern de-mosaic 
    Block Diagram -- Camera Demosaicing IP (RCCB)
  • "Image Signal Processor" with the minimum functions required for image processing system
    • lack Level correction/Demosaic/Color space conversion
    • Auto White Balance(AWB)?Auto Exposer(AE)
    • Tone curve correction/Gamma correction/Color space conversion
    Block Diagram -- "Image Signal Processor" with the minimum functions required for image processing system
  • FPGA Supervisor
    • FPGA configuration
    • Mapping FPGA frame addresses
    • Blind scrubbing
    Block Diagram -- FPGA Supervisor
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