IP Catalog > Peripheral IP > Keyboard Controller IP

Keyboard Controller IP

Welcome to the ultimate Keyboard Controller IP hub! Explore our vast directory of Keyboard Controller IP
All offers in Keyboard Controller IP
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Search (12)
Compare 12 Keyboard Controller IP from 10 vendors (1 - 10)
  • Customizable Video Input controller
    • CVI is a fully Customizable Video Input controller IP core.
    • The video input controller can be applied to e.g. FPGA systems with a resource optimized, application specific feature configuration or to ASIC projects applying a more generic feature set and thus more flexibility.
    Block Diagram -- Customizable Video Input controller
  • Customizable Display Controller IP
    • CDC is a fully Customizable Display Controller IP supporting up to 16k resolutions (4096x4096 pixel) on a MIPI-DPI compliant parallel video output.
    • Several features can be configured at synthesis time and programmed at run time.
    • The display controller can be applied to e.g. FPGA systems with a resource optimized, application specific feature configuration or to ASIC projects applying a more generic feature set and thus more flexibility.
    Block Diagram -- Customizable Display Controller IP
  • xSPI - PSRAM Master
    • The xSPI/PSRAM master IP is easy to use, simple to work with, quick to operate, and reliable under all conditions.  It supports the xSPI JESD~251 standard from a standard AXI3 or AXI4 slave interface. 
    • It also supports APMemory Octal/QSPI RAM, HyperRAM, HyperFlash, and features backwards compatibility support for Octal SPI, QSPI, DSPI, and SPI interfaces.
    Block Diagram -- xSPI - PSRAM Master
  • QSPI Master IP
    • The QSPI master core is easy to use, simple to work with, quick to operate, and reliable under all conditions.
    • It supports the majority of QSPI devices standard from a standard AXI4 slave interface. It also features support for Octal SPI, Dual SPI (DSPI), and SPI interface.
    Block Diagram -- QSPI Master IP
  • Intel 8279 Functional Equivalent Programmable Keyboard/Display Interface
    • The DB8279 Programmable Keyboard / Display Interface core is a full function equivalent to the Intel 8279 / Mitsubishi 8279 / NEC uPD8279 devices.
    • The DB8279 simultaneously and independently interface a keyboard and display to a microprocessor. The keyboard section provides a scanned interface to a 64-contact key matrix keyboard. The display section contains a 16x8 display RAM which refreshes a numeric or alphanumeric segment display.
    Block Diagram -- Intel 8279 Functional Equivalent Programmable Keyboard/Display Interface
  • General-Purpose I/O Controller with APB Interface
    • User selectable number of GPIO signals from 1 to 32
    • All GPIO signals can be bi-directional (external bi-directional I/O cells are required in that case)
    • All GPIO signals can be tri-stated or open-drain enabled (external tri-state or open-drain I/O cells are required in that case)
    • GPIO signals programmed as inputs can cause an interrupt request to the CPU
    Block Diagram -- General-Purpose I/O Controller with APB Interface
  • I3C Master and Slave Dual Role Controller
    • Compliant with the latest version of the MIPI I3C specification
    • Legacy I2C
    • I3C features
    • Low Power
    Block Diagram -- I3C Master and Slave Dual Role Controller
  • APB4 General Purpose Input/Output Module
    • Compliant with AMBA APB v2.0 Specification
    • User-defined number of Bi-directional General Purpose IO
    • Automatic synchronisation of General Inputs to Bus Clock
    • Each General Output configurable as push-pull or open-drain
    Block Diagram -- APB4 General Purpose Input/Output Module
  • PS/2 Keyboard controller, fully configurable
    • PS/2 core is used to communicate with either keyboard or mouse device
    • PS/2 core can be configured to use single or dual connection signals within the same core
    • AHB or WISHBONE SoC Interconnection Rev B compliant interface
    • PS/2 can operate in pooling or interrupt mode
    Block Diagram -- PS/2 Keyboard controller, fully configurable
  • General Purpose Input/Output controller
    • Output states: push-pull or open-drain + pull-up/down
    • Output data from output data register (GPIOx_OVAL) or peripheral (alternate function output)
    • Input states: floating, pull-up/down
    • Input data to input data register (GPIOx_IVAL) or peripheral (alternate function input)
×
Semiconductor IP