SPI IP
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37
SPI IP
from 17 vendors
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10)
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SPI Serial Peripheral Interface Master/Slave
- SPI-compatible interface
- AMBA AXI4-Lite bus
- Master or slave mode
- Full duplex
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SPI Serial Peripheral Interface Master/Slave
- SPI-compatible interface
- AMBA APB3 bus
- Master or slave mode
- Full duplex
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SPI Master / Slave Controller w/FIFO (APB Bus)
- Master and Slave SPI Modes
- Full Duplex Transfers – Simultaneous Transmit & Receive
- Four Signal Interface:
- Up to N=8 Slave Select (SS) Outputs for multiple Slaves on SPI Bus
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Serial Peripherial Interface
- Provides AXI interface
- Provides Interface to DMA
- Provides direct PIO access to SPI flash devices for BIOS boot up
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Generic Waveform Generator
- Scalable approach
- Huge set of supported protocols
- Variable set of driver ans stimuli units possible
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DO-254 SPI Slave
- Design Assurance Level A according to RTCA DO-254/ED-80 (April, 2000)
- Fully compliant to the SPI Standard (Motorola’s M68H11 Reference Manual)
- Automatically detects and adjusts to the bus data rate
- Configurable phase, polarity and word size
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DO-254 SPI Master
- Design Assurance Level A according to RTCA DO-254/ED-80 (April, 2000)
- Fully compliant to the SPI Standard (Motorola’s M68H11 Reference Manual)
- Configurable data rate
- Configurable phase, polarity and word size
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SPI Master Controller w/FIFO (AHB & AHB-Lite Bus)
- Master SPI Modes
- Full Duplex Transfers – Simultaneous Transmit & Receive
- Four Signal Interface:
- Up to N=8 Slave Select (SS) Outputs for multiple Slaves on SPI Bus
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SPI to AMBA AHB Master Bridge
- Serial SPI Compatible
- Low Pin Count Interface (4 pins)
- Can be shared with other chip I/O functions
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QSPI FLASH Controller – XIP functionality (SINGLE, DUAL and QUAD SPI Bus Controller with Double Data Rate support)
- Set of software accessible control registers to execute any Flash memory command
- Supports any device clock frequency, polarity and phase,
- Programmable baud rate generator,
- Built in FLASH Commands decoder supports most popular FLASH devices,
