IP Catalog > Analog IP

Analog IP

Analog IP generally handles every feature on a chip that connects to the outside world, plus power management and clocking.

Analog IP cores in this category include PLLs that generate various clocks, A/D converter IP and D/A converter IP that convert analog and digital signals, sensor IPs that measure temperature and voltage, and analog functional parts for configuring analog front ends (AFEs).

Explore our vast directory of Analog IP cores below.

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Search (5,722)
Compare 5,722 Analog IP from 112 vendors (1 - 10)
  • 16mA 4V Voltage Regulator on XFAB XT018
    • The TS_VR_4V00_X8 is a 4V voltage regulator capable of delivering up to 16mA. It is required for the supply of other TES IPs like TS_FS_9M70_X8,
    • TS_VA_LNDC_X8, and TS_CS_20uA_X8. The TS_VR_4V00_X8 operates with one supply voltage, VDDA5, VDDIO (5V typical) and one precision reference voltage VREF (2.5V).
    Block Diagram -- 16mA 4V Voltage Regulator on XFAB XT018
  • 50mA 1.8V Voltage Regulator with Power-Good Signal on XFAB XT018
    • The TS_VR_1V8_X8 is a 1.8V linear voltage regulator (LDO) designed to supply the digital core of an ASIC.
    • The LDO operates with an input voltage of 3.3V (supply voltage) and provides a regulated output voltage of 1.8V.
    • It can provide a maximum DC load current of up to 50mA.
    Block Diagram -- 50mA 1.8V Voltage Regulator with Power-Good Signal on XFAB XT018
  • 10mA 3.3V Low-Dropout (LDO) Regulator on XFAB XT018
    • The TS_VR_3V3_X8 is a 3.3V low-dropout linear regulator (LDO) to supply the digital core of an analog ASIC.
    • The LDO operates with an input voltage of 5V (supply voltage) and provides an output regulated voltage of 3.3V.
    • The LDO can supply a maximum DC load current of 10mA.
    Block Diagram -- 10mA 3.3V Low-Dropout (LDO) Regulator on XFAB XT018
  • 10-bit SAR ADC - XFAB XT018
    • The TS_ADC_10b_X8 is a 10-bit capacitive successive approximation register (SAR) Analog-to-Digital converter (ADC).
    • It operates with a 3.3 V analog power supply, a 1.8 V digital power supply, and an external voltage reference.
    • The ADC converts single-ended input voltages and requires no external S/H circuit.
    Block Diagram -- 10-bit SAR ADC - XFAB XT018
  • 1.7GHz Multiplying PLL on TSMC 28nm
    • Including Loop-filter
    • VCO operating range : 850MHz - 1700 MHz
    • Output frequency range : 850MHz -1700 MHz
    • Input frequency range : 9.6MHz - 216MHz
    Block Diagram -- 1.7GHz Multiplying PLL on TSMC 28nm
  • 5GHz Multiplying PLL on TSMC 28nm
    • Including Loop-filter
    • VCO operating range : 2500MHz - 5000 MHz
    • Output frequency range : 1250MHz - 2500 MHz
    • Input frequency range : 12MHz - 320 MHz
    Block Diagram -- 5GHz Multiplying PLL on TSMC 28nm
  • 1.8GHz SSCG PLL on TSMC 28nm HPC+
    • Including Loop-filter
    • VCO operating range : 900MHz - 1800 MHz
    • Output frequency range : 900MHz-1800 MHz
    • Input frequency range : 12MHz - 192MHz
    Block Diagram -- 1.8GHz SSCG PLL on TSMC 28nm HPC+
  • 3.2GHz SSCG PLL on TSMC 12nm
    • Including Loop filter
    • VCO operating range : 1600MHz- 3200MHz
    • Output frequency range: 400MHz- 3200MHz
    • Input frequency range : 10MHz- 200MHz
    Block Diagram -- 3.2GHz SSCG PLL on TSMC 12nm
  • 4.3GHz SSCG PLL on TSMC 7nm
    • Including Loop filter
    • VCO operating range : 2000MHz-4300MHz
    • Output frequency range: 500MHz-4300MHz
    • Input frequency range : 10MHz- 200MHz
    Block Diagram -- 4.3GHz SSCG PLL on TSMC 7nm
  • Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
    • TSMC IP9000 Alliance member enabling automotive IP support in TSMC automotive processes
    • Automotive Documentation including Safety Manual, FMEDA and DFMEA
    • Design reliability report containing EM/IR and Aging analysis
    Block Diagram -- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
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