Power Management IP
Welcome to the ultimate Power Management IP hub! Explore our vast directory of Power Management IP
Power Management IP, such as Low Drop-Out (LDO) Regulators, Power-On-Reset (POR) Monitors, and the Power Management Unit (PMU) Subsystem, ensure low power consumption with optimal performance.
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Power Management IP
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875
Power Management IP
from 58 vendors
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Energy Harvesting module with AC-DC converter for X-FAB 180nm
- Silicon proven in X-FAB XT018 FD-SOI
- Input frequency: 10Hz to 10kHz
- Power conversion rate: up to 65%
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LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- TSMC 3nm FinFET process
- Input voltage: 1.2 V
- Output voltage range: 0.45 V to 0.9 V
- Vout adjustable in 50 mV increments
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LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- TSMC 3nm FinFET process
- Input voltage: 1.2 V
- Output voltage range: 0.45 V to 0.9 V
- Vout adjustable in 50 mV increments
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Linear Low-Dropout Regulator (Output Voltage 0.6V)
- Output Voltage 0.6V
- TSMC12/16nm CMOS FinFET
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Linear Low-Dropout Regulator (Output Voltage 0.9V)
- Output Voltage 0.9V
- TSMC 12/16nm CMOS FinFET
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Bandgap Voltage Reference (0.6V and 0.8V References)
- 0.6V and 0.8V References
- Eight 50uA reference output currents implemented
- TSMC12/16nm CMOS FinFET
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Low-Power Combo Bandgap Voltage and Current References (1.21V/600nA) - GlobalFoundries 0.13um BCD
- 1.21V ± 0.5% (HPM - Trimmed)
- 1.21V ± 3% (LPM - Trimmed)
- 600nA ± 10% Temp. Compensated current
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Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
- ABB generator, standard cells, SRAM
- Up to 9X performance
- 75% leakage reduction
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LDO Linear Voltage Regulator
- Supply sensitive blocs from a low-quiescent LDO​
- Low leakage implementation
- Programmable output voltage
- Configurable power stages for area optimization​
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Digital Power Grid Overlay -- 20% to 40% Total Digital Dynamic Power Reduction
- 20% to 40% Digital and Dynamic Power Reduction
- Fits into any IC Digital PowerGrid Any IP compliant
