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Compare 550 PCI IP from 52 vendors (1 - 10)
  • PowerPC to PCI Bridge
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Designed for ASIC and PLD implementations.
    • Fully static design with edge triggered flip-flops.
    • Supports all PowerPC CPU with 603 bus interface and MPC860 interface.
    Block Diagram -- PowerPC to PCI  Bridge
  • PCI Bus Arbiter
    • Compliant with PCI bus specification 2.2.
    • Designed for ASIC and PLD implementations in various system environments.
    • Fully static design with edge triggered flip-flops.
    • Supports two to eight bus masters.
    Block Diagram -- PCI Bus Arbiter
  • PCI-ISA Bridge
    • Compliant with PCI bus specification 2.1 and 2.2.
    • Convert PCI transaction to ISA bus transaction.
    • Function as PCI target on PCI bus.
    • Function as ISA master on ISA bus.
    Block Diagram -- PCI-ISA Bridge
  • PCI-to-PCI Bridge
    • Fully supports PCI bus specification 2.2 and PCI bridge specification 1.1.
    • Designed for ASIC and PLD implementations.
    • Fully static design with edge triggered flip-flops.
    • Independent asynchronous PCI clocks on primary and secondary bus.
    Block Diagram -- PCI-to-PCI Bridge
  • AMBA AHB to PCI Host Bridge
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Supports AHB bus protocol.
    • Downstream access transfer from AHB bus to PCI bus.
    • Upstream access transfer from PCI bus to AHB bus.
    Block Diagram -- AMBA AHB to PCI Host Bridge
  • 64-bit PCI Host Bridge
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Designed for ASIC and PLD implementations.
    • Supports both 64-bit and 32-bit bus systems.
    • Fully static design with edge triggered flip-flops.
    Block Diagram -- 64-bit PCI Host Bridge
  • 32-bit PCI Host Bridge
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Designed for ASIC and PLD implementations.
    • Fully static design with edge triggered flip-flops.
    • Efficient back-end interface for different types of user devices.
    Block Diagram -- 32-bit PCI Host Bridge
  • 64-bit PCI Bus Target
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Supports both 64-bit and 32-bit bus systems.
    • Supports dual address cycle (DAC) 64-bit addressing.
    • Designed for ASIC and PLD implementations.
    Block Diagram -- 64-bit PCI Bus Target
  • 32-bit PCI Bus Target
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Designed for ASIC and PLD implementations.
    • Fully static design with edge triggered flip-flops.
    • Efficient back-end interface for different types of user devices.
    Block Diagram -- 32-bit PCI Bus Target
  • 64-bit PCI Bus Master/Target
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Supports both 64-bit and 32-bit bus systems.
    • Supports dual address cycle (DAC) 64-bit addressing.
    • Designed for ASIC and PLD implementations.
    Block Diagram -- 64-bit PCI Bus Master/Target
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