PCI IP

Compare 550 PCI IP from 52 vendors (1 - 10)

PowerPC to PCI Bridge
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Designed for ASIC and PLD implementations.
- Fully static design with edge triggered flip-flops.
- Supports all PowerPC CPU with 603 bus interface and MPC860 interface.
PCI Bus Arbiter
- Compliant with PCI bus specification 2.2.
- Designed for ASIC and PLD implementations in various system environments.
- Fully static design with edge triggered flip-flops.
- Supports two to eight bus masters.
PCI-ISA Bridge
- Compliant with PCI bus specification 2.1 and 2.2.
- Convert PCI transaction to ISA bus transaction.
- Function as PCI target on PCI bus.
- Function as ISA master on ISA bus.
PCI-to-PCI Bridge
- Fully supports PCI bus specification 2.2 and PCI bridge specification 1.1.
- Designed for ASIC and PLD implementations.
- Fully static design with edge triggered flip-flops.
- Independent asynchronous PCI clocks on primary and secondary bus.
AMBA AHB to PCI Host Bridge
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Supports AHB bus protocol.
- Downstream access transfer from AHB bus to PCI bus.
- Upstream access transfer from PCI bus to AHB bus.
64-bit PCI Host Bridge
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Designed for ASIC and PLD implementations.
- Supports both 64-bit and 32-bit bus systems.
- Fully static design with edge triggered flip-flops.
32-bit PCI Host Bridge
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Designed for ASIC and PLD implementations.
- Fully static design with edge triggered flip-flops.
- Efficient back-end interface for different types of user devices.
64-bit PCI Bus Target
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Supports both 64-bit and 32-bit bus systems.
- Supports dual address cycle (DAC) 64-bit addressing.
- Designed for ASIC and PLD implementations.
32-bit PCI Bus Target
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Designed for ASIC and PLD implementations.
- Fully static design with edge triggered flip-flops.
- Efficient back-end interface for different types of user devices.
64-bit PCI Bus Master/Target
- Fully supports PCI specification 2.1 and 2.2 protocol.
- Supports both 64-bit and 32-bit bus systems.
- Supports dual address cycle (DAC) 64-bit addressing.
- Designed for ASIC and PLD implementations.