FastPath: A Hybrid Approach for Efficient Hardware Security Verification
July 2, 2025
Semiconductor IP Articles
Automotive IP-Cores: Evolution and Future Perspectives
July 2, 2025
TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs
June 27, 2025
How a Standardized Approach Can Accelerate Development of Safety and Security in Automotive Imaging Systems
June 26, 2025
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models
June 25, 2025
Enabling Chiplet Design Through Automation and Integration Solutions
June 25, 2025
Shift-Left Verification: Why Early Reliability Checks Matter
June 24, 2025
How to design secure SoCs Part IV: Runtime Integrity Protection
June 24, 2025
All-in-One Analog AI Hardware: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices
June 23, 2025
From I2C to I3C: Evolution of Two-Wire Communication in Embedded Systems
June 17, 2025
QiMeng: Fully Automated Hardware and Software Design for Processor Chip
June 13, 2025
RISC-V source class riscv_asm_program_gen, the brain behind assembly instruction generator
June 13, 2025
Concealable physical unclonable functions using vertical NAND flash memory
June 11, 2025
Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
June 9, 2025
Transition Fixes in 3nm Multi-Voltage SoC Design
June 8, 2025
CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance
June 8, 2025
Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions
June 4, 2025
Automating NoC Design to Tackle Rising SoC Complexity
June 4, 2025
Memory Prefetching Evaluation of Scientific Applications on a Modern HPC Arm-Based Processor
June 3, 2025
Nine Compelling Reasons Why Menta eFPGA Is Essential for Achieving True Crypto Agility in Your ASIC or SoC
June 2, 2025
