USB4 Version 2.0 - Link Configurations
USB4 Version 2.0 specification was released by the USB Promoter Group earlier this year. This specification enables up to 80Gbps link speed per direction in symmetric mode and 120Gbps link speed in asymmetric mode.
The new version brings with it the possibility of configuring the USB4 link in asymmetric mode or transitioning to it from the symmetric mode.
There are a few changes in the terminologies as well for describing a USB4 link. The term Dual-Lane is no longer used. Instead, a USB4 link that uses two bonded lanes to transmit and receive data is called an Aggregated Link, which can be a Symmetric Link or an Asymmetric Link.
To read the full article, click here
Related Semiconductor IP
- USB4 PHY - TSMC N7 1.8V, North/South Poly Orientation
- USB4 PHY - TSMC N6 1.8V, North/South Poly Orientation
- USB4 PHY - TSMC N5 1.2V, North/South Poly Orientation
- USB4 PHY - SS SF4X, North/South Poly Orientation
- USB4 PHY - SS SF2, North/South Poly Orientation
Related Blogs
- USB4 Version 2.0 - Low Power with Gen4 Link
- USB4 Version 2.0 - Gen4 Link Recovery
- USB4 Version 2.0 - Gen4 High-Speed Lane Initialization and Training
- Latest version of SystemC, IEEE 1666-2011, now supports TLM 2.0
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview