USB4 Version 2.0 - Gen4 High-Speed Lane Initialization and Training
USB4 version 2.0 specifications were released by the USB Promoter Group earlier this year. These specifications enable up to 80Gbps link speed per direction in symmetric mode and 120Gbps link speed in asymmetric mode. Bringing up a high-speed link in USB4 consists of two parts. One part is the lane initialization, and the other is the link training.
Lane initialization comprises five phases, with each phase having an objective of its own. Phase 1 is about having the link know about the conditions that it is going to operate in, like the cable supporting Gen4 speed, being connected to the active cable having re-timers, and the cable supporting an asymmetric link. Phase 2 is about routers detecting any connected routers using the sideband channel.
In phase 3, a router acquires information about its link partner. This is done by reading the configuration registers of the link partner by using the sideband AT transactions. Specifically, the link operates in Gen4 speeds, if the lane adapters of both sides support Gen4 speed, the connecting cable supports Gen4 speed, and both lanes are enabled on each side of the link. If the link operates in Gen4 speed, then RS-FEC is always enabled.
After the lane initialization, whether the link will operate as a symmetric link or asymmetric (3 Tx/1 Rx or 3 Rx/1 Tx) link is determined in phase 3.
Related Semiconductor IP
- USB4 Gen3 x2-lane PHY, TSMC 12FFC, 1.8V, N/S orientation, type-C
- USB4 Gen3 x2-lane PHY, TSMC N7, 1.8V or 1.2V, N/S orientation, type-C
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- USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C
- USB4 Controller & Router IP
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- USB4 Version 2.0 - Low Power with Gen4 Link
- USB4 Version 2.0 - Link Configurations
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