MIPI UniPro through eyes of PCI Express
Sometime last week, I noticed that I had a missed call from an unknown number. Curious to know who the caller was, I called back. To my pleasant surprise it was one of my ex-senior colleagues, Sarvesh. It had been a long time since we'd spoken to each other. After a quick general chat, the conversation turned to technology.
We recalled the old days of working on PCI Express; those debates we would have over Advisory non fatal error reporting in the Advanced Error Reporting (AER )1.1 part of the PCI Express specification. The AER was a challenge in terms of specification interpretation. But, Sarvesh was adept at it. I learnt a lot from him. A perspective that he provided which I still cherish is his question: What will a particular inference in case of ambiguities translate to, in real world? Often this question helped us discover “why things are the way they are” and resolve the ambiguities.
Related Semiconductor IP
- MIPI UniPro Software Stack
- Mipi Unipro Verification IP
- Simulation VIP for MIPI UniPro
- MIPI UniPro Verification IP
- MIPI Unipro Synthesizable Transactor
Related Blogs
- MIPI UniPro through eyes of PCI Express
- Interface Protocols, USB3, PCI Express, MIPI, SATA... the winners and losers in 2012
- Interface Protocols, USB3, PCI Express, MIPI, DDRn... the winner and losers in 2013
- Navigating the Complexity of Address Translation Verification in PCI Express 6.0
Latest Blogs
- Rivos Collaborates to Complete Secure Provisioning of Integrated OpenTitan Root of Trust During SoC Production
- From GPUs to Memory Pools: Why AI Needs Compute Express Link (CXL)
- Verification of UALink (UAL) and Ultra Ethernet (UEC) Protocols for Scalable HPC/AI Networks using Synopsys VIP
- Enhancing PCIe6.0 Performance: Flit Sequence Numbers and Selective NAK Explained
- Smarter ASICs and SoCs: Unlocking Real-World Connectivity with eFPGA and Data Converters