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MIPI UniPro IP

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Compare 30 MIPI UniPro IP from 9 vendors (1 - 10)
  • MIPI M-PHY - TSMC 40nm
    • Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
    • •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
    • •Supports M-PHY Type-I system
    • •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
    Block Diagram -- MIPI M-PHY - TSMC 40nm
  • UFS 3.0 Host Controller compatible with M-PHY 4.0 and UniPro 1.8
    • UFS 3.0 Host and Device configurations available
    • Complete UFS 3.0 hardware implementation
    • Interop-proven UniPro 1.8 link layer
    Block Diagram -- UFS 3.0 Host Controller compatible with M-PHY 4.0 and UniPro 1.8
  • UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6
    • Compliant with JESD220B UFS 2.0
    • MIPI UniPro version 1.6
    • High-performance M-PHY v3.0 type 1
    Block Diagram -- UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6
  • UFS 2.1 Host Controller compatible with M-PHY 3.1 and UniPro 1.6
    • JEDEC UFS 2.0 and UFS HCI 2.0 Compliant
    • Supports high performance M-PHY v3.0 type-1
    • 2 lanes @ 5.9 Gbps per lane
    Block Diagram -- UFS 2.1 Host Controller compatible with M-PHY 3.1 and UniPro 1.6
  • Mipi Unipro Verification IP
    • MIPI UniPro VIP is fully compliant with MIPI UniPro Specification 2.0 and MIPI M-PHY Specification 5.0
    • Fully supports Transport Layer, Network Layer, Data Link Layer, PHY Adapter Layer and Device Management Entity
    • Supports maximum of four Lanes in each direction
    • Supports different HS-GEAR or PWM-GEAR in both directions.
    Block Diagram -- Mipi Unipro Verification IP
  • Simulation VIP for MIPI UniPro
    • Serial and RMMI Interfaces
    • Supports Serial and RMMI interfaces (downstream)
    • CPort Signal Interface
    • Supports CPort signal interface (upstream)
    Block Diagram -- Simulation VIP for MIPI UniPro
  • MIPI UniPro Verification IP
    • Supports MIPI UniPro specification 1.41,1.6,1.8 and 2.0.
    • Support MIPI MPHY specification 3.0,4.1 and 5.0.
    • Supports data control at each layer of UniPro Specification for easy debug.
    • Supports multiple connections in L4 Layer and L4 segments.
    Block Diagram -- MIPI UniPro Verification IP
  • MIPI Unipro Synthesizable Transactor
    • Supports MIPI UniPro specification 1.41, 1.6 and 1.8
    • Supports MIPI MPHY specification 3.0 and 4.1
    • Supports data control at each layer of UniPro Specification for easy debug
    • Supports multiple connections in L4 Layer and L4 segments
    Block Diagram -- MIPI Unipro Synthesizable Transactor
  • MIPI UniPro IIP
    • Compliant with MIPI UNIPRO specification version 1.6,1.8 and 2.0
    • Supports MIPI M-PHY specification 3.0 ,4.1 and 5.0
    • Supports multiple connections in L4 Layer and L4 segments
    • Supports M-PHY HS data rates HS-Gear1 – Gear5, both A/B modes and PWM
    Block Diagram -- MIPI UniPro IIP
  • Mipi Unipro Verification IP
    • MIPI UniPro VIP is fully compliant with MIPI UniPro Specification 2.0 and MIPI M-PHY Specification 5.0
    • Fully supports Transport Layer, Network Layer, Data Link Layer, PHY Adapter Layer and Device Management Entity
    • Supports maximum of four Lanes in each direction
    • Supports different HS-GEAR or PWM-GEAR in both directions.
    Block Diagram -- Mipi Unipro Verification IP
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