Cipher Accelerator IP

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Compare 183 Cipher Accelerator IP from 48 vendors (1 - 10)
  • AES-XTS MULTI-BOOSTER
    • AMBA interface
    • Supported key sizes: 128, 192 and 256 bits
    • Compliant with NIST SP 800-38e
    • Tunable performance (area and performance) - From low area to high-performance
    Block Diagram -- AES-XTS MULTI-BOOSTER
  • Secure-IC's Securyzr(TM) AES-GCM Multi-Booster Réduire la liste des FPGA aux noms des gammes
    • High throughput
    • Guaranteed performance with small packets
    • 128-bit and 256-bit key
    Block Diagram -- Secure-IC's Securyzr(TM)  AES-GCM Multi-Booster  Réduire la liste des FPGA aux noms des gammes
  • AES-GCM Ultra-low latency crypto engine
    • High throughput: 64 GB/s (512 Gbps)
    • Ultra-low latency
    • Optional CRC support for data integrity
    • 128-bit and 256-bit key
    • NIST SP 800-38D compliant
    Block Diagram -- AES-GCM Ultra-low latency crypto engine
  • Secure-IC's Securyzr(TM) Crypto Coprocessor (Premium)
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    Block Diagram -- Secure-IC's Securyzr(TM)  Crypto Coprocessor (Premium)
  • Secure-IC's Securyzr(TM) Crypto Coprocessor (Compact)
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    Block Diagram -- Secure-IC's Securyzr(TM)  Crypto Coprocessor (Compact)
  • Secure-IC's Securyzr(TM) Crypto Coprocessor (Standard)
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    Block Diagram -- Secure-IC's Securyzr(TM)  Crypto Coprocessor (Standard)
  • Sub-2.5G AES Encryption Core
    • Compliant with Advanced Encryption Standard Fips197 with key size 256-bits.
    • Integrates Galois/Counter (GCM) authenticated encryption/decryption mode of operation in accordance with NIST 800-38D
    • Supports 96-bit Initialization Vector (IV)
    • Supports up to 16B Authentication TAG
    Block Diagram -- Sub-2.5G AES Encryption Core
  • 400G AES Encryption Core
    • Compliant with Advanced Encryption Standard Fips197 with key size 256-bits.
    • Integrates Galois/Counter (GCM) authenticated encryption/decryption mode of operation in accordance with NIST 800-38D
    • Supports 96-bit Initialization Vector (IV)
    • Supports up to 16B Authentication TAG
    Block Diagram -- 400G AES Encryption Core
  • 10G/25G/40G/50G AES Encryption Core
    • Compliant with Advanced Encryption Standard Fips197 with key size 256-bits.
    • Integrates Galois/Counter (GCM) authenticated encryption/decryption mode of operation in accordance with NIST 800-38D
    • Supports 96-bit Initialization Vector (IV)
    • Supports up to 16B Authentication TAG
    Block Diagram -- 10G/25G/40G/50G AES Encryption Core
  • 100G AES Encryption Core
    • Compliant with Advanced Encryption Standard Fips197 with key size 256-bits.
    • Integrates Galois/Counter (GCM) authenticated encryption/decryption mode of operation in accordance with NIST 800-38D
    • Supports 96-bit Initialization Vector (IV)
    • Supports up to 16B Authentication TAG
    Block Diagram -- 100G AES Encryption Core
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