Symmetric Encryption IP

Compare 159 Symmetric Encryption IP from 45 vendors (1 - 10)

Advanced DPA- and FIA-resistant FortiCrypt AES SW library
- Ultra-strong side-channel and SIFA protection at high performance
- NIST FIPS-197 compliant
- AES-128/192/256 encryption and decryption
- Tunable protection level
DPA- and FIA-Resistant Balanced FortiCrypt AES IP Core
- A wide range of configurations to match the user’s cost/performance target
- Low latency
- Passes the rigorous Test Vector Leakage Assessment (TVLA) methodology at 1B traces
- Protected against fault injection attacks, including SIFA
- Tunable protection level
- Optional embedded internal PRNG for random masking
DPA and FIA-Resistant Ultra-Compact FortiCrypt AES IP core
- Ultra-compact
- Ultra-efficient in terms of performance per gate
- Passes the rigorous Test Vector Leakage Assessment (TVLA) methodology at 1B traces
- Protected against fault injection attacks, including SIFA
- Tunable protection level
DPA- and FIA-resistant Ultra Low Power FortiCrypt AES IP core
- Ultra-low power in terms of performance per watt
- Passes the rigorous Test Vector Leakage Assessment (TVLA) methodology at 1B traces
- Protected against fault injection attacks, including SIFA
- Tunable protection level
- Optional embedded internal PRNG for random masking
DPA- and FIA-resistant Ultra High Bandwidth FortiCrypt AES IP core
- Ultra-high bandwidth due to multi-pipeline architecture, HUNDREDs Gbps (@500 MHz on a 45nm tech. process)
- GCM authentication tag protection (patent pending)
- Ultra-strong side-channel attack protection (at least 1B traces)
- Protected against fault injection attacks including SIFA
AES Engine IP
- The AES engine IP is a high-performance cryptographic engine operates in AES NIST Federal information processing standard FIPS-197.
- It supports AES-ECB AES-XTS mode and 128/256 key-length both encryption/decryption.
- The core engine supports 128/256/512 data width operation.
SNOW 3G Encryption Core
- Keystream generation using the SNOW 3G Algorithm
- High throughput: up to 7.5 Gbps in 65 nm process
- Small size: from 7.5K ASIC gates
- Satisfies ETSI SAGE SNOW 3G specification
NIST AES Key Wrap/Unwrap Core
- Small size: AKW1 starts from less than 8,000 ASIC gates
- Completely self-contained: does not require external memory
- Supports both encryption (wrap) and decryption (unwrap). Encryption-only and decryption only versions available.
- Includes AES key expansion
Ultra-Compact Data Encryption Standard (DES/3DES) Core
- Encrypts and decrypts using the DES / TDEA / Triple DES / 3DES Block Cipher Algorithm
- High throughput: up to 3 Gbps at 750 MHz in 90 nm LV technology
- Small size: from 3K ASIC gates for a triple DES core
- Satisfies FIPS 46-3 from the US National Institute of Standards and Technology (NIST)
Ultra-Compact Advanced Encryption Standard (AES, FIPS-197) Core
- Encrypts using the AES Rijndael Block Cipher Algorithm.
- Satisfies Federal Information Processing Standard (FIPS) Publication 197 from the US National Institute of Standards and Technology (NIST). FIPS-197 validated (AESAVS).
- Processes 128-bit data blocks with 8, 16 or 32-bit data interface
- Employs key sizes of 128 bits (AES128), 192, or 256 bits (AES256)