Post-Quantum Key Encapsulation IP Core

Overview

The PQC-KEM is an IP Core for ML-KEM Key Encapsulation that supports key generation, encapsulation, and decapsulation operations for all ML-KEM variants standardized by NIST in FIPS 203. ML-KEM is a post-quantum cryptographic (PQC) algorithm, designed to be robust against a quantum computer attack. It belongs to the Key Encapsulation Mechanism (KEM) algorithm, that, can be used by two parties to establish a shared secret key over a public channel.

The IP core provides hardware acceleration for computationally intensive operations while maintaining a small footprint and flexibility in deployment. In addition, it is a standalone and encapsulated IP core which can be integrated into any system on chip (SoC) for ASIC or FPGA implementation.

Resource Utilization and Performance

Device

Logic (LUTs)

Registers (FF)

fmax (MhZ)

AMD (Xilinx) Zynq Ultrascale MPSoC 

8189

9296

175.3

AMD (Xilinx) Kintex-7

8158 

9296

119.3

AMD (Xilinx) Spartan 7

8158 

9296

75.8

Efinix Ti120

8461

9110

135.2

Intel (Altera) Agilex 7

14796

11406

230.8

Intel (Altera) Arria 10

7839

9710

115.8

Intel (Altera) Cyclone 10 GX

7977

9706

154.1

Intel (Altera) Stratix 10

14065

10423

143.1

Lattice Avant E

8130

9627

98.7

Key Features

  • FIPS 203 compliant
  • Supports ML-KEM 512/768/1024 sets
  • Self-contained engine with a minimal attack surface
  • Hardware offloading and acceleration for ML-KEM operations
  • Protection against timing-based side channel attacks
  • AMBA® AXI4-Lite Interface
  • For any FPGA and ASIC

Benefits

  • Security by Design: A self-contained engine with a minimal attack surface.
  • Highly cost-efficient: Post-Quantum IP Core that ensures excellent performance with low purchasing costs
  • Ressource-efficient: IP core designed to have minimal logic utilization

Block Diagram

Post-Quantum Key Encapsulation IP Core Block Diagram

Applications

  •  Quantum-Resistant Networks
  •  Public Key Infrastructures
  •  Network Security: MACsec, IPsec
  •  Transport Protocols: TLS, SSL
  •  Secure Communications
  •  Electronic Transactions

Deliverables

  • System Verilog RTL Source Code
  • Testbenches
  • Integration examples
  • Software HAL & driver source code
  • Software example source code
  • Documentation

Technical Specifications

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Semiconductor IP