RSA Signature Verification IP Core
XIP5012C is a very compact Intellectual Property (IP) core designed for RSA (Rivest-Shamir-Adleman) signature verification.
- RSA
Cryptography IP cores provide hardware-based security functions for protecting data, communications, and digital assets in modern SoC and ASIC designs. By offloading cryptographic operations from software, these IP cores deliver higher performance, lower latency, improved energy efficiency, and stronger resistance to security attacks.
This category includes Symmetric Cryptography, Public Key Cryptography, Post-Quantum Cryptography (PQC), Hash / MAC, and Random Number Generator (RNG) IP solutions. Available implementations may support algorithms such as AES, ChaCha20, RSA, ECC, ML-KEM, ML-DSA, SHA-2, SHA-3, HMAC, CMAC, and true or deterministic random number generation technologies required for secure key management and authentication.
This catalog enables semiconductor engineers to evaluate and compare Cryptography IP from leading vendors based on supported algorithms, security certifications, throughput, latency, power consumption, silicon area, side-channel resistance, quantum-safe capabilities, and semiconductor process node compatibility.
RSA Signature Verification IP Core
XIP5012C is a very compact Intellectual Property (IP) core designed for RSA (Rivest-Shamir-Adleman) signature verification.
Curve25519 Key Exchange and Digital Signature IP Core
XIP4003C is a very compact Intellectual Property (IP) core designed for efficient X25519 key exchange and Ed25519-based Edwards-c…
Curve25519 Key Exchange IP Core
XIP4001C is a very compact Intellectual Property (IP) core designed for efficient key exchange using the X25519 protocol.
AES-CTR, Advanced Encryption Standard (256-bit key), Counter Mode IP Core
The AES-CTR IP cores implement the AES in Counter mode, effectively turning a block cipher into a stream cipher while providing m…
The eSi-POLY1305 core is an easy to use POLY1305 accelerator peripheral that is fully compliant with the RFC7539 IETF standard.
The eSi-CHACHA20 core is an easy to use CHACHA20 stream cipher hardware accelerator that is compliant with the IETF RFC7539 stand…
The SM4-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the SM4 algorithm (a block cipher specifi…
Deterministic Random Bit Generator (DRBG)
The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that tar…
100% Secure Cryptographic System for RSA, Diffie-Hellman and ECC with AMBA AHB, AXI4 and APB
CryptOne is a fully scalable, hardware-accelerated cryptographic system built on 20+ years of DCD-SEMI’s engineering experience.
Chacha20-Poly1305 Multi-Booster
The ChaCha20-Poly1305 Multi-Booster Crypto Engine is RFC7539 compliant to provide Authenticated Encryption with Associated Data (…
The SM4 IP core implements a custom hardware accelerator for the SM4 symmetric block cipher, specified in Chinese national standa…
The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash.
The SNOW3G IP core is 3GPP confidentiality and integrity algorithms (UEA2/UIA2) stream cipher for telecommunication applications,…
The KASUMI IP core is 3GPP confidentiality and integrity algorithms (UEA1/UIA1) stream cipher for telecommunication applications,…
The ZUC IP core is 3GPP confidentiality and integrity algorithms (EEA3/EIA3) stream cipher for telecommunication applications, re…
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hash…
AES Based Random Number Generator Core
A random number generator core suitable for cryptographic applications such as producing keys and other critical security paramet…
Ultra high performance AES-GCM for OTN networks
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and can be configured for perfo…
Small RSA/ECC Public Key Accelerators
The PKA-IP-28 is a family of Public Key Accelerator IP cores designed for full scalability and an optimal “performance over gate …
Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
The Protocol-IP-197 Multi-Protocol Engine is an IP family for accelerating IPSec, SSL, TLS, DTLS (CAPWAP), 3GPP and MACsec up to …