Why Modern SoC need cache-coherent NoC?

By SemiWiki

August 4, 2015

Launching high technology product on the semiconductor market after your competitors is not necessarily a weakness. NetSpeed has developed NocStudio, a front end optimization design tool helping architects to create SoC architecture bridging the gap with the back end, floor planning and place and route. Created about 20 years after Sonics and 8 years after Arteris, NetSpeed has capitalized on the positive (Sonics and even more Arteris have evangelized the semiconductor industry about how important NoC integration could be for design optimization and to avoid routing congestion) and learn from competitor’s weaknesses, the most crucial being the need for a NoC to support cache-coherency in modern multi-core designs.

Approaching design teams involved into System-on-Chip (SoC) like Application Processors for smartphones and the numerous SoC developed to support Multimedia, Network Processing, Servers, Computing and so on, NetSpeed has realized that their main competitor is internal design team! NetSpeed evaluates that about 80% of the SoC integrates internally developed solutions like proprietary buses, crossbars, and fabrics.

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