New 16Gbps Multi-link, Multi-protocol SerDes PHY Enhances Datacenter Connectivity
PCIe Gen4 is bringing new possibilities to servers and virtualization. The interface increases the bandwidth and value of data transmission from server to server, switch to switch, and server to storage, enabling even larger dataset analysis and other complex cloud services.
High-speed SerDes technology is used to implement these high-speed connections, often at advanced nodes such as 14/16nm. To be sure, it's becoming increasingly difficult to create robust designs while meeting short project timescales.Why not partner with a leading IP provider instead of doing your own IP design?
To read the full article, click here
Related Semiconductor IP
- Ethernet SerDes - 16Gbps and 10Gbps multi-protocol SerDes PHY
- Multiprotocol SerDes PMA
- 32G LR Multi-Protocol SerDes (MPS) PHY - GLOBALFOUNDRIES 22nm
- 28G LR Multi-Protocol SerDes (MPS) PHY - Samsung 14nm
- 28G LR Multi-Protocol SerDes (MPS) PHY - GLOBALFOUNDRIES 12nm
Related Blogs
- 16Gbps SerDes Multiprotocol Multilink PHY IP
- Rambus showcases 56G Multi-Protocol SerDes (MPS) PHY at the Samsung Foundry Forum
- 32G Multi-Protocol SerDes PHY Out the Gate
- 112G LR SerDes PHY Ready for Next-Gen Networking Gear
Latest Blogs
- CNNs and Transformers: Decoding the Titans of AI
- How is RISC-V’s open and customizable design changing embedded systems?
- Imagination GPUs now support Vulkan 1.4 and Android 16
- From "What-If" to "What-Is": Cadence IP Validation for Silicon Platform Success
- Accelerating RTL Design with Agentic AI: A Multi-Agent LLM-Driven Approach