Implementing Power Management IP for Dynamic and Static Power Reduction in Configurable Microprocessors using the Galaxy Design Platform at 130nm By June 8, 2005
Electronic system-level development: Finding the right mix of solutions for the right mix of engineers By June 6, 2005
Platform to Validate SoC Designs and Methodologies Targeting Nanometer CMOS Technologies By May 26, 2005
Simultaneous Exploration of Power, Physical Design and Architectural Performance Dimensions of the SoC Design Space using SEAS By May 19, 2005