Dual-port FPGA memory blocks: the ultimate system interconnect solution?

By Danny Tseng, Cypress Semiconductor     

The performance of dual-ports memory blocks in FPGAs is highly dependent on device utilization and how these blocks are instantiated.

Using dual-port memories ("dual ports") as system interconnects has proven to be an effective interface strategy for bridging multiple processing elements in high-performance applications.

Not only do dual-ports offer high-bandwidth communication between processors, they also provide the flexibility that is often required in fast-evolving design environments. Different dual-port implementations have emerged in recent years, and system designers now have the option of using a traditional dual-port or integrating the dual-port into an onboard FPGA. Newer FPGA families offer internal memory blocks that can be configured as dual-ports, and major FPGA vendors often market their FPGA dual-port as "free integrated memory." However, this is not entirely accurate, as the performance of these dual-ports is highly dependent on device utilization and how these memory blocks are instantiated. Moreover, overall system cost is a critical factor in the decision making process for dual-port implementation.

This article evaluates the validity of FPGA vendors' claims by taking the reader through a recent benchmarking effort on integrated dual-ports in FPGAs. Five popular FPGA families are examined and the performance of their integrated dual-ports is benchmarked against an external dual-port implementation.

Introduction

As the demand for processing power increases in high-performance applications, using multiple processors has become the inevitable choice for many of today's designs. The immediate problem that emerges with a dual (or more) processor architecture is how these processors communicate with one another. In systems where the processors operate independently, one of the proven approaches is to use a dual-port interconnect. Not only do dual-ports offer high-bandwidth communication between processors, they also provide the flexibility that is often required in fast-evolving design environments.

Different dual-port implementations have emerged in recent years, and system designers now have the option of using a discrete dual-port or a dual-port integrated onto an FPGA. Newer FPGA families offer internal memory blocks that can be configured as dual-ports. Major FPGA vendors often market their FPGA dual-port as "free integrated memory," although the performance of these dual-ports is highly dependent on device utilization and how memory blocks are instantiated. Moreover, FPGA devices only offer a limited amount of configurable memory, as it does not make economical sense to increase the size of the FPGA for more integrated dual-port.

The rest of this article evaluates dual-port approaches based on a recent benchmarking effort of integrated dual-ports using different FPGA families. Three industry-leading high-performance and two low-cost FPGA families have been examined and analyzed, and the performance of the integrated dual-ports is compared with a discrete dual-port implementation.

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