FlexGen Streamlines NoC Design as AI Demands Grow

By Abhishek Jadhav, embedded.com

As semiconductor designs evolve in complexity and scale, the role of interconnect IP becomes increasingly central to performance, power efficiency, and time to market. To address this, Arteris has introduced FlexGen, an AI-augmented network-on-chip (NoC) interconnect IP platform aimed at simplifying and accelerating the design process for system-on-chip (SoC) and chiplet-based architectures.

FlexGen builds on Arteris’s FlexNoC 5 technology and leverages a large library of system IP to automate NoC generation. It is designed to support a broad spectrum of processor architectures, including Arm, RISC-V, and x86. FlexGen integrates machine learning and physical design awareness to optimize topologies based on a user’s performance goals and floor-planning constraints.

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