SoCs Get a Helping Hand from AI Platform FlexGen
By Gary Hilson, EETimes | March 21, 2025
FlexGen, a network-on-chip (NoC) interconnect IP, is aiming to accelerate SoC creation by leveraging AI.
Developed by Arteris Inc., FlexGen promises to deliver a 10× productivity boost while reducing design iterations and the time required to develop. In a briefing with EE Times, Arteris CMO Michal Siwinski said FlexGen achieves up to a 30% reduction in wire length to lower power use, as well as up to 10% reduction in latency that results in improved performance in SoC and chiplet designs.
“It will actually do the process of generating that network on chip, generating that interconnect and it will actually generate however many interconnects are required to meet the requirement,” Siwinski said.
Using AI and machine learning for chip design isn’t new, Siwinski said, but often the productivity boosts come at the cost of performance or power. FlexGen is able to reduce the number of elements on the critical path of a project, while also improving power/performance metrics, which he said is unique.
To read the full article, click here
Related Semiconductor IP
- Smart Network-on-Chip (NoC) IP
- NoC System IP
- Non-Coherent Network-on-Chip (NOC)
- Coherent Network-on-Chip (NOC)
- High speed NoC (Network On-Chip) Interconnect IP
Related News
- Arteris Deployed by Menta for Edge AI Chiplet Platform
- Arteris Revolutionizes Semiconductor Design with FlexGen – Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- Arm Drives Next-Generation Performance for IoT with World’s First Armv9 Edge AI Platform
- Alphawave Semi Delivers Foundational AI Platform IP for Scale-Up and Scale-Out Networks
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack