Automating NoC Design Masters SoC Complexity
By Sally Ward-Foxton, EETimes | May 21, 2025
Today, we’re diving into the critical role of network-on-chip (NoC) design in modern system-on-chip (SoC) architectures. Designing efficient interconnects has become a major challenge as SoCs grow more complex, especially with the increasing integration of AI workloads. NoCs now account for a significant portion of silicon area, making it essential to get them right. Michal Siwinski, Chief Marketing Officer at Arteris, will join us in discussing how FlexGen, their network-on-chip IP technology, is revolutionizing NoC design through automation. We’ll explore why this is crucial for today’s chips, how it addresses the growing demands of AI, and what the future holds for NoC technology.
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Related Semiconductor IP
- Smart Network-on-Chip (NoC) IP
- FlexNoC 5 Interconnect IP
- FlexNoC Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
- NoC System IP
- Non-Coherent Network-on-Chip (NOC)
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