AES-XTS, Advanced Encryption Standard (256-bit key), XTS mode IP Core
XIP1183B from Xiphera is a balanced Intellectual Property (IP) core implementing the Encryption Standard (AES) with 256 bits long…
- AES
Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
AES-XTS, Advanced Encryption Standard (256-bit key), XTS mode IP Core
XIP1183B from Xiphera is a balanced Intellectual Property (IP) core implementing the Encryption Standard (AES) with 256 bits long…
SM4-GCM Multi-Booster crypto engine
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.329…
AES-GCM Ultra-low latency crypto engine
The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm c…
Fully Digital Physically Unclonable Function (PUF) - PQC Ready
A Physically Unclonable Function (PUF) is a security mechanism that uses the inherent physical variations of a device to generate…
AES Mutli-Purpose crypto engine
The AES Multi-Purpose crypto engine includes a generic and scalable implementation of the AES algorithm and a configurable wrappe…
HKDF/HMAC/SHA-256/SHA-512, SHA-256 IP Core with Extended Functionalities
XIP3327Cis a versatile Intellectual Property (IP) core designed for SHA-256 and SHA-512 cryptographic hash functions with extende…
HKDF/HMAC/SHA-256, SHA-256 IP Core with Extended Functionalities
XIP3322B is a versatile Intellectual Property (IP) core designed for SHA-256 cryptographic hash function with extended support fo…
AES-GCM, Advanced Encryption Standard (256-bit key), Galois Counter Mode IP Core
XIP1113H from Xiphera is a high-throughput Intellectual Property (IP) core implementing the Encryption Standard (AES) in Galois C…
AES-GCM, Advanced Encryption Standard (256-bit key), Galois Counter Mode IP Core
XIP1113B from Xiphera is a balanced Intellectual Property (IP) core implementing the Encryption Standard (AES) in Galois Counter …
True Random Number Generator (TRNG)
The TRNG IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true r…
RSA Signature Verification IP Core
XIP5012C is a very compact Intellectual Property (IP) core designed for RSA (Rivest-Shamir-Adleman) signature verification.
Curve25519 Key Exchange and Digital Signature IP Core
XIP4003C is a very compact Intellectual Property (IP) core designed for efficient X25519 key exchange and Ed25519-based Edwards-c…
Curve25519 Key Exchange IP Core
XIP4001C is a very compact Intellectual Property (IP) core designed for efficient key exchange using the X25519 protocol.
AES-CTR, Advanced Encryption Standard (256-bit key), Counter Mode IP Core
The AES-CTR IP cores implement the AES in Counter mode, effectively turning a block cipher into a stream cipher while providing m…
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model.
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model.
UHF RFID tag IC with cryptographic authentication and -15 dBm sensitivity
The chip is intended for use in passive UHF transponder applications.
Embedded HSM Family (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
The Rambus RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware secu…
The eSi-POLY1305 core is an easy to use POLY1305 accelerator peripheral that is fully compliant with the RFC7539 IETF standard.
The eSi-CHACHA20 core is an easy to use CHACHA20 stream cipher hardware accelerator that is compliant with the IETF RFC7539 stand…