Chacha20-Poly1305 IP for FPGA and ASIC
ChaCha20-Poly1305 is an AEAD algorithm based on the very fast ChaCha20 stream cipher with the Poly1305 MAC.
- Chacha20
Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
Chacha20-Poly1305 IP for FPGA and ASIC
ChaCha20-Poly1305 is an AEAD algorithm based on the very fast ChaCha20 stream cipher with the Poly1305 MAC.
Elliptic Curve Digital Signature Algorithm
Modern public-key cryptography is built on elliptic curves, which are essential to reliable key agreement methods and safe digita…
Elliptic Curve Digital Signature Algorithm
CryptOne's abilities encompass not just supporting several elliptic curves but also the recognized Elliptic Curve Digital Signatu…
Secure Hash Algorithm 256 IP Core
A universal solution that effectively accelerates the SHA2-256 hash function conforming with FIPS PUB 180-4 is the SHA2-256 bridg…
Secure Hash Algorithm 512 IP Core
A universal solution that effectively accelerates the SHA2-512 hash function complying with FIPS PUB 180-4 is the SHA2-512 bridge…
Secure Hash Algorithm 384 IP Core
Bridge to APB, AHB, and AXI bus SHA2-384 is a universal solution that effectively speeds up the SHA2-384 hash function that compl…
Advanced Encryption Standard compliant with FIPS 197
AES bridge, a cryptographic coprocessor that complies with FIPS 197 Encryption Standard, employs the Rijndael encryption method t…
Elliptic Curve Cryptography IP
Our ECC IP Core is a solution that gives your systems access to the capabilities of elliptic curve encryption.
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence i…
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators.
Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Ad…
Multipurpose Security Protocol Accelerator
Complex system-on-chip (SoC) requirements can include security at the MAC layer, VPN layer, and application layer.
High-Performance AES-XTS/ECB IP
Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external d…
High-Performance AES-GCM/CTR IP
The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the Nation…
Embedded Security Modules for HDCP 2.3 on HDMI IP
The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are solutions that pr…
HDCP 2.3 Embedded Security Modules on DisplayPort/USB Type-C
The Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are solutions that provide des…
Multiport/Multiprotocol HDCP 2.3 Embedded Security Modules
The Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are solutions that provide des…
eSi-Kyber is a hardware accelerator core designed to accelerate post-quantum Key Encapsulation Mechanism (KEM) as defined by NIST…
CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
eSi-Dilithium is a hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard.
SHA3 core for accelerating NIST FIPS 202 Secure Hash Algorithm
eSi-SHA3 is area-efficient hardware accelerator core for the SHA3 and SHAKE cryptographic hashing algorithms compliant with the N…