Building a robust HBM2 PHY
February 20, 2017
What is HBM?
HBM is a high-performance memory that features reduced power consumption and a small form factor. More specifically, it combines 2.5D packaging with a wider interface at a lower clock speed (as compared to DDR4) to deliver higher overall throughput at a higher bandwidth-per-watt efficiency for high-performance computing applications.
To read the full article, click here
Related Semiconductor IP
Related Blogs
- Rambus highlights HBM2 PHY collaboration at GLOBALFOUNDRIES Technology Conference
- Building a Swiss cheese model approach for processor verification
- UCIe Heralds a Robust Chiplet Ecosystem for a New Era of SoC Innovation
- Need to develop robust Indian semicon industry, led by local companies!
Latest Blogs
- Cadence Extends Support for Automotive Solutions on Arm Zena Compute Subsystems
- The Role of GPU in AI: Tech Impact & Imagination Technologies
- Time-of-Flight Decoding with Tensilica Vision DSPs - AI's Role in ToF Decoding
- Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry’s Transformation to Software-Defined Vehicles
- Deep Robotics and Arm Power the Future of Autonomous Mobility