AI Requires Tailored DRAM Solutions: Part 3
October 6, 2020
Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part two of this four-part series touched on multiple topics including how AI enables useful data processing, various types of AI silicon, and the evolving role of DRAM. This blog post (part three) takes a closer look at the impact of AI on specific hardware systems, training versus inference, and selecting the most appropriate memory for AI/ML applications.
To read the full article, click here
Related Semiconductor IP
Related Blogs
- AI Requires Tailored DRAM Solutions: Part 1
- AI Requires Tailored DRAM Solutions: Part 2
- AI Requires Tailored DRAM Solutions: Part 4
- Redefining XPU Memory for AI Data Centers Through Custom HBM4 – Part 3
Latest Blogs
- A Low-Leakage Digital Foundation for SkyWater 90nm SoCs: Introducing Certus’ Standard Cell Library
- FPGAs vs. eFPGAs: Understanding the Key Differences
- UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
- RT-Europa: The Foundation for RISC-V Automotive Real-Time Computing
- Arm Flexible Access broadens its scope to help more companies build silicon faster