How to design an Interlaken to SPI-4.2 bridge

By Farhad Shafai (Sarance Technologies) and Sri Purisai (Altera)
May 30 2007 (16:34 PM), Courtesy of Programmable Logic DesignLine

The future of networking is about higher bandwidth and lower power. More and more applications, such as video, continue to drive the bandwidth demands placed on networking equipment. At the same time, networking equipment must deliver these higher bandwidths without a dramatic increase in power consumption. Every aspect of a system is affected by these requirements and – specifically for chip-to-chip interconnect technology – traditional solutions fail to meet these demands.

Interlaken is a relatively new chip-to-chip interconnect technology develop by Cisco Systems and Cortina Systems to help pave the way for the future of networking. Interlaken is based on low-power high-speed serial links and it is designed to be easily scalable to any bandwidth. It can meet the demand of today's 20 Gbps and tomorrow's 100 Gbps system by providing the following features:

 

 

• Low pin-count, low-power serial connectivity
• Channelized protocol
• Robust error checking and management
• Low protocol overhead

As more and more application specific standard products (ASSPs) are manufactured with Interlaken interfaces, there is a need for bridging devices to connect these new ASSPs to legacy devices with different interfaces. Fig 1 shows the block diagram of a typical networking line card with a bridge device used to connect the two network processor units (NPUs) to the front-end MAC device.

 

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