The Growing Imperative Of Hardware Security Assurance In IP And SoC Design By Pavani Jella, Silicon Assurance January 8, 2025
Tackling Network-on-Chip (NoC) Scaling Challenges with a System-technology Co-optimization Approach By Moritz Brunion, imec January 7, 2025
Last-Time Buy Notifications For Your ASICs? How To Make the Most of It By Enrique Martinez, EnSilica January 6, 2025
Optimized Clocking Solutions for High-Performance Die-to-Die Interfaces By Blake Gray, Silicon Creations January 6, 2025
The backpropagation algorithm implemented on spiking neuromorphic hardware By Alpha Renner, University of Zurich December 18, 2024
Integrating Ethernet, PCIe, And UCIe For Enhanced Bandwidth And Scalability For AI/HPC Chips By Madhumita Sanyal, Synopsys December 16, 2024
eUSB2V2 with 4.8Gbps and Use Cases: A Comprehensive Overview By David Shin, Cadence December 10, 2024
Early Interactive Short Isolation for Faster SoC Verification By Ritu Walia, Siemens December 6, 2024
Growing demand for high-speed data in consumer devices gives rise to new generation of low-end FPGAs By Jason Zhu, CEO, GOWIN Semiconductor December 4, 2024
Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning By Andy Nightingale, Arteris November 28, 2024
Why Transceiver-Rich FPGAs Are Suitable for Vehicle Infotainment System Designs By Danny Fisher, GOWIN Semiconductor November 27, 2024
New Realities Demand a New Approach to System Verification and Validation By Vijay Chobisa, Siemens November 22, 2024
How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications By Danny Fisher, GOWIN Semiconductor November 20, 2024
Sustainable Hardware Specialization By Pranav Dangi, National University of Singapore November 18, 2024
PCIe IP With Enhanced Security For The Automotive Market By Dana Neustadter, Synopsys November 14, 2024