Commentary: ESL success demands outsourcing
Bryn Parry and Christopher Lennard, ARM
(01/05/2007 2:40 PM EST), EE Times
Job applications are up on corporate websites: seeking engineer with C++ / SystemC experience, knowledge of the hardware development process, experience in system verification, 3 to 5 years experience in system-on-chip design, understanding of OS porting issues a plus. Critical position, starts immediately!
It's just a call for an electronic system level (ESL) engineer, but the phone stays silent. Why? In 2000, ESL became the "next big thing" for business and universities, but the lack of sufficiently qualified engineering is still throttling the up-take of system-level design.
In 2007, the intellectual property (IP) and EDA industry businesses that have invested in ESL need to take a hard and practical look at themselves. Theoretically, it is obvious how system-level design can improve product quality and time to market by enabling fast simulation platforms and early design exploration. Practically, it is a much different story.
To read the full article, click here
Related Semiconductor IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- IPSEC AES-256-GCM (Standalone IPsec)
- Parameterizable compact BCH codec
- 1G BASE-T Ethernet Verification IP
- Network-on-Chip (NoC)
Related News
- Commentary: Why it's time to redefine ESL
- Commentary: How ESL can regain credibility
- Commentary: ESL should drive emulation
- Commentary: ANSI C won't work for ESL
Latest News
- Mythic to Challenge AI’s GPU Pantheon with 100x Energy Advantage and Oversubscribed $125M Raise
- Accelerating Vehicle Electrification and Intelligence to Drive Automotive Semiconductor Market to Nearly US$100 Billion by 2029
- Cassia.ai Achieves Breakthrough in AI Accelerator Technology with Successful Tapeout of two Test Chips
- Toshiba to accelerate semiconductor design innovation with Siemens’ EDA software
- SEMIFIVE Strengthens AI ASIC Market Position Through IPO “Targeting Global Markets with Advanced-nodes, Large-Die Designs, and 3D-IC Technologies”