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AMBA AHB / APB IP

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Search (211)
Compare 211 AMBA AHB / APB IP from 25 vendors (1 - 10)
  • SPI to AHB Bridge
    • The SPI to AHB bridge is an SPI slave that provides a link between a SPI bus (that consists of two data signals, one clock signal and one select signal) and AMBA AHB.
    • On the SPI bus the slave acts as an SPI memory device where accesses to the slave are translated to AMBA accesses.
    • The core can translate SPI accesses to AMBA byte, half-word or word accesses. The access size to use is configurable via the SPI bus.
    Block Diagram -- SPI to AHB Bridge
  • 10/100 Mbit Ethernet MAC
    • The GRETH core implements a 10/100 Mbit/s Ethernet Media Access Controller (MAC) with AMBA host interface.
    • The core implements the 802.3-2002 Ethernet standard. Receive and transmit data is autonomously transferred between the Ethernet MAC and the AMBA AHB bus using DMA transfers.
    Block Diagram -- 10/100 Mbit Ethernet MAC
  • CAN 2.0 Controller with DMA
    • GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend.
    • The APB bus is used for configuration, control and status handling and the AHB bus is used for retrieving and storing CAN messages via the DMA engine.
    Block Diagram -- CAN 2.0 Controller with DMA
  • AMBA AHB Direct Memory Acess (DMA) Controller
    • Multiple independent DMA channels with direct AHB bus interface.
    • DMA transfers between AHB memory devices and I/O ports.
    • Scatter-gather allows DMA to merge multiple data source to contiguous space.
    • Supports both hardware initiated transfer and software initiated transfer.
    Block Diagram -- AMBA AHB Direct Memory Acess (DMA) Controller
  • AMBA AHB Bus Master
    • Supports AHB bus interface to the ARM CPU.
    • User interface designed for high speed access to any slave devices on the AHB Bus.
    • User specified single or burst data access on the AHB interface and user interface.
    • Handles wait state insertion by any slave devices.
    Block Diagram -- AMBA AHB Bus Master
  • AMBA AHB Bus Slave
    • Supports AHB bus interface to the ARM CPU.
    • User interface designed for high speed access to two sets of on-chip or off-chip modules.
    • Four write buffers to process posted write.
    • Dual read buffers to process CPU read.
    Block Diagram -- AMBA AHB Bus Slave
  • AMBA AHB to PCI Host Bridge
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Supports AHB bus protocol.
    • Downstream access transfer from AHB bus to PCI bus.
    • Upstream access transfer from PCI bus to AHB bus.
    Block Diagram -- AMBA AHB to PCI Host Bridge
  • AMBA ATB Verification IP
    • Compliant to AMBA 5 ATB (aka ATB-C), AMBA 4 ATB (aka ATB v1.1) and AMBA 3 ATB (aka ATB v1.0) Protocol.
    • Parameterized address and data width and hence capable of configuring all possible ATB and TPIU bus widths.
    • Bus Monitor is easy to Plug-in and is compliant with standard specifications.
    • Support for static and dynamic protocol checks.
    Block Diagram -- AMBA ATB Verification IP
  • AMBA APB 5,4,3,2 Verification IP
    • Compliant to AMBA APB5, AMBA APB v.2.0 (aka APB4), AMBA® 3 APB v1.0 and AMBA® 2APB.
    • Support for all types of AMBA APB devices.
    • Supports Parameterized data and address bus.
    • Supports bus-endian converter/checker.
    Block Diagram -- AMBA APB 5,4,3,2 Verification IP
  • AMBA AHB 5 Verification IP
    • Compliant to AMBA®5 AHB Protocol specifications and AMBA 3 AHB-Lite Verification IP from ARM
    • Support for all type of AMBA AHB devices:
      • AHB5Master
      • AHB5Slave
    • AHB5Master
    • AHB5Slave
    Block Diagram -- AMBA AHB 5 Verification IP
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