CAN 2.0 Controller with DMA

Overview

GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend. The APB bus is used for configuration, control and status handling and the AHB bus is used for retrieving and storing CAN messages via the DMA engine.

GRCAN supports transmission and reception of sets of messages by use of circular buffers located in memory external to the  core. Separate transmit and receive buffers are assumed. Reception and transmission of sets of messages can be ongoing simultaneously.

Key Features

  • 20-1000 kbps bitrate
  • CAN 2.0B with standard and extended frame format
  • Message filtering
  • DMA using circular buffers of configurable size
  • Single shot transmission

Block Diagram

CAN 2.0 Controller with DMA Block Diagram

Deliverables

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Technical Specifications

Maturity
Production
Availability
Now
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Semiconductor IP