IP for TSMC

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Compare 249 IP for TSMC from 16 vendors (1 - 10)
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  • 3nm
  • General-purpose & Specialized Ring PLLs + RTL-based Solutions
    • Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
    • Input & output frequency ranges greater than 1000:1
    Block Diagram -- General-purpose & Specialized Ring PLLs + RTL-based Solutions
  • Universal Chiplet Interconnect Express (UCIe™) PHY
    • Supports up to 32Gbps per pin including 4/8/12/16/24Gbps
    • Forwarded clock, track, and valid pins
    • Sideband messaging for link training and parameter exchange
    • KGD (Known Good Die) testing capability
    • Redundant lane repair (advanced)
    • Width degradation (standard)
    • Lane reversal
    Block Diagram -- Universal Chiplet Interconnect Express (UCIe™) PHY
  • 224G-LR SerDes PHY enables 1.6T and 800G networks
    • Optimized Performance, Power and Area with Design Agility
    • Supports full-duplex 1.25 to 225Gbps data rates
    • Enables 1.6T, 800G, 400G, and 200G Ethernet with a PHY + Controller solution
    • Supports evolving IEEE 802.3 and OIF-CEI-224G standard electrical specifications
    • Meets the performance requirements of chip-to-module (VSR), chip-to-chip (MR), and copper/backplane (LR) interconnects
    Block Diagram -- 224G-LR SerDes PHY enables 1.6T and 800G networks
  • PVT Sensor Subsystem
    • Start-up time: Typ 20us
    • Current consumption: Max 25uA
    • Industry standard digital interface
    Block Diagram -- PVT Sensor Subsystem
  • Sleep Management Subsystem
    • Power-On-Reset
    • Programmable relaxation oscillator
    • Low Power Comparator
    Block Diagram -- Sleep Management Subsystem
  • Power Management Subsystem
    • Start-up time: Typ 20us
    • Industry standard digital interface
    • Configurable logic to control sequencing and monitoring
    Block Diagram -- Power Management Subsystem
  • Sensor Interface Subsystem
    • Industry standard digital interface
    • Fully integrated macro
    • Standard AMBA APB interface
    Block Diagram -- Sensor Interface Subsystem
  • Digital Cell Library TSMC
    • Compact standard cell library targeting a wide range of foundries and processes
    Block Diagram -- Digital Cell Library TSMC
  • IR DROP TSMC
    • • Active current current: 120uA
    • • Powered-down current: <1uA
    • • Detection time: 25nS typ.
    • • Hysteresis: 20mV typ.
    Block Diagram -- IR DROP TSMC
  • RC Oscillator TSMC
    • Start-up Time: Typ 10us
    • Frequency Range: 20KHz – 100MHz
    • Accuracy (Calibrated) Max = ? 5%
    • Current Consumption1: Typ 100uA @ 10MHz
    Block Diagram -- RC Oscillator TSMC
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