USB4: Higher Performance and Combined Data, Display, and Power
The most awaited news of the year is officially here! USB Promoter Group has officially announced USB4 specification, which is an extensive upgrade over USB 3.2 specification. The new specification guarantees double the speed of USB 3.2 Gen 2×2, and has built in Thunderbolt™ 3 compatibility. The official specification release is expected by mid-2019.
Aligning with the USB-IF’s announcement, Synopsys also announced Industry’s First USB4 Subsystem Verification Solution, VIP, and Test Suite for High-performance USB Architecture. The Synopsys press release mentioned, “USB4 represents a significant specification update that will require a robust certification program to ensure delivery of compliant and interoperable USB devices in the consumer market,” said USB-IF president and chief operating officer Jeff Ravencraft. “Synopsys VIP for USB4 strengthens the USB ecosystem and facilitates early adoption and rapid development of the high-performance next-generation USB architecture.”
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related Blogs
- DDR5 12.8Gbps MRDIMM IP: Powering the Future of AI, HPC, and Data Centers
- FPGA Insights and Trends 2023: Unleashing the Power of FPGA
- Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge
- FPGA Chiplets Get a Power and Cost Makeover Thanks to New Partnership
Latest Blogs
- Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications
- Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
- Quintauris: Accelerating RISC-V Innovation for next-gen Hardware
- Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?