Connected by Arteris: Watching The Next Big Semiconductor Transition Unfold
Impressions from the 2nd Annual Chiplet Summit
From February 6th to 8th, 2024, a fascinating mix of engineers descended on the Santa Clara convention center for the Chiplet Summit. It felt like representatives from all aspects of the semiconductor ecosystem attended – providers of Semiconductor Intellectual Property (IP) like us, Electronic Design Automation (EDA) tool vendors, Wafer Fab Equipment (WFE) providers, Semiconductor Foundries, “Fabless” chip companies, and Integrated Design Manufacturers (IDMs) all in one place to discuss one thing – chiplets. The agenda varied from sessions discussing how to develop them, the architectures to integrate them, the substrates to assemble them on, the standards needed to connect them, the business models to enable them, and the industries and application domains setting requirements for them.
To read the full article, click here
Related Blogs
- Portable Stimulus: The Next Big Leap In SoC Verification
- Vision-Language Models (VLM) – the next big thing in AI?
- Are IP subsystems the next big IP category?
- Ethernet in Cars - The Next Big Thing for Ethernet
Latest Blogs
- Breaking the Bandwidth Barrier: Enabling Celestial AI’s Photonic Fabric™ with Custom ESD IP on TSMC’s 5nm Platform
- What Does a GPU Have to Do With Automotive Security?
- Physical AI at the Edge: A New Chapter in Device Intelligence
- Rivian’s autonomy breakthrough built with Arm: the compute foundation for the rise of physical AI
- AV1 Image File Format Specification Gets an Upgrade with AVIF v1.2.0