SiFive execs share ideas on their RISC-V strategy
October 6, 2016
Since its formation just last year, SiFive has been riding the RISC-V rocket from purely academic interest to first commercialization. In an exclusive discussion, I talked with CEO Stefan Dyckerhoff and VP of Product and Business Development Jack Kang about their progress so far and what may be coming next.
Previously, I covered the introduction of the SiFive Freedom E300 and U500 platforms of RISC-V IP cores. From the comments we got, I’m not sure people understood what the SiFive business model is, or what their ecosystem looks like. As Dyckerhoff put it, SiFive is at the tail end of its design process with its initial offering commercial cores – but there is a lot more to the strategy.
To read the full article, click here
Related Semiconductor IP
- Compact Embedded RISC-V Processor
- Neuromorphic Processor IP
- Flexible Pixel Processor Video IP
- Neural Video Processor IP
- GPNPU Processor IP - 32 to 864TOPs
Related Blogs
- SiFive collaborates with new Intel Foundry Services to enable innovative new RISC-V computing platforms
- SiFive RISC-V Proven in 5nm Silicon
- Delivering on the Promise of Industry-Leading RISC-V Processors
- RISC-V Chiplets, Disaggregated Die, and Tiles
Latest Blogs
- The Memory Imperative for Next-Generation AI Accelerator SoCs
- Leadership in CAN XL strengthens Bosch’s position in vehicle communication
- Validating UPLI Protocol Across Topologies with Cadence UALink VIP
- Cadence Tapes Out 32GT/s UCIe IP Subsystem on Samsung 4nm Technology
- LPDDR6 vs. LPDDR5 and LPDDR5X: What’s the Difference?