51st DAC - in pictures!
July 2, 2014
Its almost a month since DAC happened… and we finally got around to putting up some of the pictures we took during DAC. It was our first time at DAC, and we showcased our JEDEC UFS and MIPI verification IPs. Sharing some moments captured during the short lunch (or should I say sandwitch) breaks!
Related Semiconductor IP
- HOTLink II IP Core
- High Speed Data Bus (HSDB) IP Core
- 1-port Receiver or Transmitter HDCP 2.3 on HDMI 2.1 ESM
- HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
- HDMI 2.0 RX PHY in SS 8LPP 1.8V, North/South Poly Orientation
Related Blogs
- Unveiling NOP Insertion Hint: A Performance Optimizer in CXL 3.0
- Unraveling the Newly Introduced Segmentation in PCIe 6.0
- Sunny skies and electric energy: RISC-V Summit Europe 2024 shines in Munich
- DAC 2024 - Showcasing the future of RISC-V through EDA
Latest Blogs
- UALink™ Shakes up the Scale-up AI Compute Landscape
- Scaling Out Deep Learning (DL) Inference and Training: Addressing Bottlenecks with Storage, Networking with RISC-V CPUs
- Cadence Transforms Chiplet Technology with First Arm-Based System Chiplet
- Redefining XPU Memory for AI Data Centers Through Custom HBM4 – Part 2
- Redefining XPU Memory for AI Data Centers Through Custom HBM4 – Part 1