A revolution in functional verification
URL: http://www.eetimes.com/showArticle.jhtml?articleID=204701843
Exhaustive functional coverage promises to revolutionize the design of ICs and other digital systems. Exhaustive coverage is now a genuine possibility because the scientific and mathematical foundation for measuring functional space objectively has been revealed.
Mushy concepts like "features" and "functionality" no longer serve designers. These concepts can be useful for thinking about the capabilities of a design, but they don't lend themselves to objective enumeration by software in the way commercial extraction tools discover and exhaustively enumerate timing paths. Engineers enumerate features, and two different teams of engineers are unlikely to produce two identical lists of features for an identical design.
Now it's possible to turn to the science of functional verification to achieve superior results.
The science of functional verification applies to any digital hardware system, regardless of size or complexity. It enables designers to engineer a verification solution that completely addresses the design as defined in the specifications.
To read the full article, click here
Related Semiconductor IP
- ReRAM NVM in DB HiTek 130nm BCD
- UFS 5.0 Host Controller IP
- PDM Receiver/PDM-to-PCM Converter
- Voltage and Temperature Sensor with integrated ADC - GlobalFoundries® 22FDX®
- 8MHz / 40MHz Pierce Oscillator - X-FAB XT018-0.18µm
Related Articles
- Leveraging UVM based UFS Test Suite approach for Accelerated Functional Verification of JEDEC UFS IP
- SoC Functional verification flow
- RTL Prototyping Brings Hardware Speeds to Functional Verification
- IP Verification : Standards eye functional verification
Latest Articles
- An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks
- Enabling RISC-V Vector Code Generation in MLIR through Custom xDSL Lowerings
- A Scalable Open-Source QEC System with Sub-Microsecond Decoding-Feedback Latency
- SNAP-V: A RISC-V SoC with Configurable Neuromorphic Acceleration for Small-Scale Spiking Neural Networks
- An FPGA Implementation of Displacement Vector Search for Intra Pattern Copy in JPEG XS