Embedded system virtualization for executable specifications and use case modeling
By Vincent Perrier, CoFluent Design (Nantes, France)
edadesignline.com (January 26, 2010)
Specifying and validating embedded systems and chips becomes increasingly challenging as feature sets and non-functional constraints grow. It's especially difficult when the system involves a multicore programmable platform, which includes several processing engines such as microprocessors, microcontrollers or DSPs, that run application software distributed across the various cores.
The development of the hardware (HW) platform — system-on-chip (SoC) or board — and the application software (SW) is usually done by separate teams, and often by separate companies. In general, the hardware platform development team includes software engineers in charge of developing low-level platform-dependent software — also called firmware (FW) — including boot loaders, C runtime and libraries, operating systems and device drivers. Software engineers also usually develop middleware (MW), including protocol stacks and various libraries, providing specific application programming interfaces (API) to application software developers — the platform users.
To read the full article, click here
Related Semiconductor IP
- RVA23, Multi-cluster, Hypervisor and Android
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- NPU IP Core for Mobile
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
- H.264 Decoder
Related White Papers
- Enabling error resilience throughout the embedded system
- Selecting an operating system for an embedded application
- Secure Virtualization as an Enabler of Trusted Execution Environments in Embedded Computing
- Enabling security in embedded system using M.2 SSD
Latest White Papers
- QiMeng: Fully Automated Hardware and Software Design for Processor Chip
- RISC-V source class riscv_asm_program_gen, the brain behind assembly instruction generator
- Concealable physical unclonable functions using vertical NAND flash memory
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design