DOLPHIN Integration releases a ROM in 65 nm with Ultra high density and ultra low leakage
May 9, 2007 -- DOLPHIN Integration releases a ROM in 65 nm with Ultra high density and ultra low leakage:
- Denser than dense is what everyone in the semiconductor industry is looking for!
- Every mm2 saved in return saves a ggod number of cents.
Its key “two-in-one” patent enables “tROMet Phoenix” to achieve challenging density, while equally offering ultra low leakage.
Typically, the silicon area of a 6-Mbit instance in 65 nm will decrease as far as 0.63 mm2 with only 1.2 uA leakage current, and the same 6-Mbit instance in 90 nm will be as low as 0.95 mm2 with only 1.8 uA leakage current.
For more information, please visit:
http://www.dolphin.fr/flip/ragtime/65/ragtime_65_rom.html
Related Semiconductor IP
- Flash Memory LDPC Decoder IP Core
- SLM Signal Integrity Monitor
- All Digital Fractional-N RF Frequency Synthesizer PLL in GlobalFoundries 22FDX
- USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
- TSMC CLN5FF GUCIe LP Die-to-Die PHY
Related News
- Dolphin Integration announce the availability of new ROM TITAN and ultra low leakage standard cell library SESAME BIV at TSMC 55 nm LP eFlash
- Ultra high density standard cell library SESAME uHD-BTF to enrich Dolphin Integration's panoply at TSMC 90 nm eF and uLL
- Do not miss the Green Thursday offering for ultra Low-Power SoCs at 55 nm
- Shanghai Zhaoxin Semiconductor Co., Ltd. licenses Dolphin Integration ultra dense audio DAC for its next generation of Set Top Box
Latest News
- Axiomise Partners With Bluespec to Verify Its RISC-V Cores
- Rapidus Achieves Significant Milestone at its State-of-the-Art Foundry with Prototyping of Leading-Edge 2nm GAA Transistors
- SEMIFIVE Files for Pre-IPO Review on KRX
- Innosilicon Scales LPDDR5X/5/4X/4 and DDR5/4 Combo IPs to 28nm and 22nm, Cementing Its Position as the ‘One Stop’ for Memory Interface Solutions
- Synopsys Completes Acquisition of Ansys